LT3070EUFD#PBF

{
  "slug": "lt3070eufd-pbf",
  "version": "0.1.0",
  "type": "component",
  "description": "Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, QFN-28-EP(4x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "power management (pmic)",
    "lt3070eufd#pbf",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "lt3070eufd-pbf.kicad_sym",
    "lt3070eufd-pbf.kicad_mod",
    "lt3070eufd-pbf.glb",
    "lt3070eufd-pbf.step",
    "lt3070eufd-pbf.lbr",
    "docs/hero.png",
    "docs/lt3070eufd-pbf-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "lt3070eufd-pbf-hero.glb",
    "lt3070eufd-pbf-hero.overlay.json",
    "lt3070eufd-pbf-etched.glb"
  ],
  "component": {
    "mpn": "LT3070EUFD#PBF",
    "manufacturer": "Analog Devices",
    "package": "QFN-28-EP(4x5)",
    "pin_count": 29,
    "category": "Power Management (PMIC)",
    "subcategory": "Voltage Regulators - Linear, Low Drop Out (LDO) Regulators",
    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883501533827072",
    "parts": {
      "symbol": "lt3070eufd-pbf.kicad_sym",
      "footprint": "lt3070eufd-pbf.kicad_mod",
      "model_3d": "lt3070eufd-pbf-hero.glb",
      "model_3d_plain": "lt3070eufd-pbf-etched.glb",
      "model_3d_step": "lt3070eufd-pbf-etched.step",
      "model_3d_step_plain": "lt3070eufd-pbf.step",
      "lbr": "lt3070eufd-pbf.lbr"
    },
    "distributor_links": {
      "lcsc": "C107813",
      "digikey": "505-LT3070EUFD#PBF-ND",
      "mouser": "584-LT3070EUFD#PBF"
    },
    "distributor_check": {
      "checked_at": "2026-10-19T01:02:00Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "505-LT3070EUFD#PBF-ND",
        "status": "found"
      },
      "mouser": {
        "pn": "584-LT3070EUFD#PBF",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "VIOC",
        "type": "output",
        "description": "Output of the tracking function that drives an external buck regulator to hold the LT3070 input at VOUT + 300mV."
      },
      {
        "number": "2",
        "name": "PWRGD",
        "type": "output",
        "description": "Open-drain NMOS power-good output that pulls low if VOUT is below 90% of nominal on its rising edge or below 85% for more than 25µs, junction temperature typically exceeds 145°C, VBIAS is below its UVLO threshold, or the OUT-to-IN reverse-current detector activates."
      },
      {
        "number": "3",
        "name": "REF/BYP",
        "type": "output",
        "description": "Bandgap reference output with approximately 19kΩ impedance that must not be externally loaded and may be bypassed to GND with a 10nF capacitor."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "5",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply to the high-current pass transistor; tie all IN pins together and bypass with at least 47µF, with the IN pin voltage range given as 0.95V to 3.0V."
      },
      {
        "number": "6",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply to the high-current pass transistor; tie all IN pins together and bypass with at least 47µF, with the IN pin voltage range given as 0.95V to 3.0V."
      },
      {
        "number": "7",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply to the high-current pass transistor; tie all IN pins together and bypass with at least 47µF, with the IN pin voltage range given as 0.95V to 3.0V."
      },
      {
        "number": "8",
        "name": "IN",
        "type": "power_in",
        "description": "Input supply to the high-current pass transistor; tie all IN pins together and bypass with at least 47µF, with the IN pin voltage range given as 0.95V to 3.0V."
      },
      {
        "number": "9",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "11",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "12",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "13",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "14",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "15",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output that supplies the load; tie all OUT pins together and provide at least 15µF of low-ESR ceramic output capacitance for stability."
      },
      {
        "number": "16",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output that supplies the load; tie all OUT pins together and provide at least 15µF of low-ESR ceramic output capacitance for stability."
      },
      {
        "number": "17",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output that supplies the load; tie all OUT pins together and provide at least 15µF of low-ESR ceramic output capacitance for stability."
      },
      {
        "number": "18",
        "name": "OUT",
        "type": "power_out",
        "description": "Regulated output that supplies the load; tie all OUT pins together and provide at least 15µF of low-ESR ceramic output capacitance for stability."
      },
      {
        "number": "19",
        "name": "SENSE",
        "type": "input",
        "description": "Kelvin sense input to the inverting error amplifier, best connected at the load, with input current typically 50µA at VOUT = 0.8V rising to 300µA at VOUT = 1.8V."
      },
      {
        "number": "20",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "21",
        "name": "MARGSEL",
        "type": "input",
        "description": "Three-state margining enable and polarity input: below 250mV enables negative margining, above VBIAS - 250mV enables positive margining, and the Hi-Z window disables margining."
      },
      {
        "number": "22",
        "name": "MARGTOL",
        "type": "input",
        "description": "Three-state margining tolerance input selecting ±1% when low (below 250mV), ±5% when high (above VBIAS - 250mV), and ±3% in the Hi-Z window."
      },
      {
        "number": "23",
        "name": "VO0",
        "type": "input",
        "description": "Three-state output voltage select input that combines with VO1 and VO2 to set VOUT from 0.8V to 1.8V in 50mV steps; logic low is below 250mV and logic high is above VBIAS - 250mV."
      },
      {
        "number": "24",
        "name": "VO1",
        "type": "input",
        "description": "Three-state output voltage select input that combines with VO0 and VO2 to set VOUT from 0.8V to 1.8V in 50mV steps; it is overridden internally when VO2 is high so VOUT is limited to 1.8V."
      },
      {
        "number": "25",
        "name": "VO2",
        "type": "input",
        "description": "Three-state output voltage select input that combines with VO0 and VO1 to set VOUT from 0.8V to 1.8V in 50mV steps; when high, it limits VOUT to 1.8V maximum by overriding VO1."
      },
      {
        "number": "26",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin that must be tied to the exposed pad (pin 29) and the other GND pins for electrical and thermal performance."
      },
      {
        "number": "27",
        "name": "BIAS",
        "type": "power_in",
        "description": "Bias supply for control circuitry and the pass transistor driver, which must satisfy 2.2V ≤ VBIAS ≤ 3.6V and VBIAS ≥ (1.25 • VOUT + 1V) and requires at least a 2.2µF bypass capacitor."
      },
      {
        "number": "28",
        "name": "EN",
        "type": "input",
        "description": "Enable input that turns the output device on or off, with a maximum rising threshold of 0.56 % of VBIAS, a minimum falling threshold of 0.36 % of VBIAS, and a pull-up resistor that must be less than 35k; connect to BIAS if unused."
      },
      {
        "number": "29",
        "name": "GND",
        "type": "power_in",
        "description": "Exposed pad, electrically connected to GND, which must be soldered to the PCB ground and tied to all GND pins for thermal and electrical performance."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The 'Pin Functions' section lists pins 1-4, 5-8, 9-14, 15-19, 20, 26 and 29 on page 13 and pins 21-2; The datasheet has 28 leads plus an exposed pad (pin 29). Pin 29 is included as GND (power_in) per th; Package variant: the ordering table lists LT3070EUFD#PBF as 28-Lead (4mm × 5mm) Plastic QFN (UFD pac"
        ],
        "pages_sent": 10,
        "cost_usd": 0.0897,
        "at": "2026-10-19T01:01:43"
      },
      "datasheet": {
        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588883501533827072",
        "pages": 30,
        "sha256": "59f97ca88b397a7c",
        "source_tier": "lcsc"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 29,
        "described": 29,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "lt3070eufd-pbf.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          5.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "028686d522379f70cdcac54d7cbc05f7e8d72fe41515288068d2e2da8d27bc8d",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "lt3070eufd-pbf-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.0,
          5.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "10c3f4f0ffb0f1a6678fea37f136df9b649df89fa99a213ec61fb77550b4d8f0",
        "checked": "2026-10-19",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  }
}