component
LT3060IDC#TRPBF
Public Made by Adomby adom
Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LT3060IDC#TRPBF
Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-8-EP(2x2)
LT3060IDC#TRPBF from Analog Devices, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF/BYP | passive | A single capacitor from this pin to GND bypasses the reference noise and soft-starts the reference, with a 10nF bypass typically reducing output noise to 30µVRMS over 10Hz to 100kHz; the pin is pulled low in shutdown and must not be driven by active circuitry, and it must be left floating if low noise or soft-start is not needed. |
| 2 | ADJ | input | This is the inverting input of the error amplifier, regulated to 600mV referenced to GND, with a typical bias current of 15nA flowing out of the pin, and a capacitor from ADJ to OUT is used for noise and transient improvement above 600mV; for fixed-voltage versions it must be left floating. |
| 3 | OUT | power_out | Output pin that supplies the load, requiring a minimum 2.2µF ceramic output capacitor for stability, with a permissible output voltage range of 600mV to 44.5V. |
| 4 | OUT | power_out | Output pin that supplies the load, requiring a minimum 2.2µF ceramic output capacitor for stability, with a permissible output voltage range of 600mV to 44.5V. |
| 5 | IN | power_in | Input pin that supplies power to the device over an input range of 1.6V to 45V, with a 1µF to 10µF input bypass capacitor recommended and an IN pin voltage rating of ±50V absolute maximum. |
| 6 | IN | power_in | Input pin that supplies power to the device over an input range of 1.6V to 45V, with a 1µF to 10µF input bypass capacitor recommended and an IN pin voltage rating of ±50V absolute maximum. |
| 7 | SHDN | input | Shutdown input where pulling it low puts the device into a low-power state and turns the output off; it cannot be driven below GND unless tied to IN, the device does not function if left unconnected, and it should be tied to IN if unused. |
| 8 | GND | power_in | Ground pin; for the adjustable LT3060 the bottom of the output divider resistor should connect directly to this GND, and pin 8 must be tied to exposed pad pin 9 and the PCB ground. |
| 9 | GND | power_in | Exposed pad that is GND and must be soldered to the PCB, tied directly to pin 8 and the PCB ground to provide the enhanced thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN Pin Voltage | -50 | 50 | V | 2 | |||
| OUT Pin Voltage | -50 | 50 | V | 2 | |||
| Input-to-Output Differential Voltage | -50 | 50 | V | Note 2 | 2 | ||
| ADJ Pin Voltage | -50 | 50 | V | 2 | |||
| SHDN Pin Voltage | -50 | 50 | V | 2 | |||
| REF/BYP Pin Voltage | -0.3 | 1 | V | Note 1 | 2 | ||
| Operating Junction Temperature (E-, I-Grades) | TJ | -40 | 125 | °C | E-, I-Grades | 2 | |
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Input Voltage Range | VIN | 1.6 | 45 | V | 1 | ||
| Output Voltage Range (adjustable) | VOUT | 0.6 | 44.5 | V | Permissible output voltage range | 15 | |
| Output Current | IOUT | 100 | mA | 1 | |||
| Output Capacitor | COUT | 2.2 | µF | Ceramic, ESR of 3Ω or less | 18 | ||
| Input Bypass Capacitor | CIN | 1 | 10 | µF | 15 | ||
| Junction-to-Ambient Thermal Resistance (DC package) | θJA | 48 | 60 | °C/W | * SEE APPLICATIONS INFORMATION SECTION | 2 | |
| Maximum Junction Temperature (DC package) | TJMAX | 125 | °C | DC package | 2 | ||
| Minimum Input Voltage | 1.6 | 2.1 | V | ILOAD = 100mA (Notes 4, 12) | 4 | ||
| ADJ Pin Voltage | 594 | 600 | 606 | mV | VIN = 2.1V, ILOAD = 1mA | 4 | |
| ADJ Pin Voltage | 588 | 600 | 612 | mV | 2.1V < VIN < 45V, 1mA < ILOAD < 100mA (E-, I-Grades) | 4 | |
| Line Regulation | 0.6 | 3.5 | mV | ΔVIN = 2.1V to 45V, ILOAD = 1mA (E-, I-Grades) (Note 4) | 4 | ||
| Load Regulation | 0.2 | 4 | mV | VIN = 2.1V, ILOAD = 1mA to 100mA (E-, I-Grades) (Note 4) | 5 | ||
| Dropout Voltage | 75 | 110 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA | 5 | ||
| Dropout Voltage | 180 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA, l (full operating temperature range) | 5 | |||
| Dropout Voltage | 150 | 200 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA | 5 | ||
| Dropout Voltage | 300 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA, l (full operating temperature range) | 5 | |||
| Dropout Voltage | 240 | 280 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14) | 5 | ||
| Dropout Voltage | 410 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14), l (full operating temperature range) | 5 | |||
| Dropout Voltage | 300 | 350 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14) | 5 | ||
| Dropout Voltage | 510 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14), l (full operating temperature range) | 5 | |||
| GND Pin Current | 40 | 80 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 0µA (Notes 6, 8) | 5 | ||
| GND Pin Current | 60 | 100 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1mA (Notes 6, 8) | 5 | ||
| GND Pin Current | 160 | 350 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 10mA (Notes 6, 8) | 5 | ||
| GND Pin Current | 0.8 | 1.8 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 50mA (Notes 6, 8) | 5 | ||
| GND Pin Current | 2 | 4 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 100mA (Notes 6, 8) | 5 | ||
| Quiescent Current in Shutdown | 0.3 | 1 | µA | VIN = 45V, VSHDN = 0V | 5 | ||
| ADJ Pin Bias Current | 15 | 60 | nA | VIN = 2.1V (Note 9) | 5 | ||
| Shutdown Threshold (OFF to ON) | 0.3 | 0.8 | V | VOUT = Off to On | 5 | ||
| Shutdown Threshold (ON to OFF) | 0.7 | 1.5 | V | VOUT = On to Off | 5 | ||
| SHDN Pin Current | 0.9 | µA | VSHDN = 0V (Note 10) | 5 | |||
| SHDN Pin Current | 1 | 3 | µA | VSHDN = 45V (Note 10) | 5 | ||
| Ripple Rejection | 70 | 85 | dB | VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA; VIN = 2.1V (Avg) (Note 4) | 5 | ||
| Current Limit | 110 | 200 | mA | VIN = VOUT(NOMINAL) + 1V (Notes 6, 12), ΔVOUT = -5%, l | 5 | ||
| Input Reverse Leakage Current | 300 | µA | VIN = -45V, VOUT = 0, l | 6 | |||
| Reverse Output Current | 0.2 | 10 | µA | VOUT = 1.2V, VIN = 0V (Note 11) | 6 | ||
| Junction-to-Ambient Thermal Resistance (2500mm² topside, 2500mm² backside, 2500mm² board) | θJA | 48 | °C/W | Topside 2500 mm², backside 2500 mm², board area 2500 mm² | 20 | ||
| Junction-to-Ambient Thermal Resistance (1000mm² topside, 2500mm² backside, 2500mm² board) | θJA | 49 | °C/W | Topside 1000 mm², backside 2500 mm², board area 2500 mm² | 20 | ||
| Junction-to-Ambient Thermal Resistance (225mm² topside, 2500mm² backside, 2500mm² board) | θJA | 50 | °C/W | Topside 225 mm², backside 2500 mm², board area 2500 mm² | 20 | ||
| Junction-to-Ambient Thermal Resistance (100mm² topside, 2500mm² backside, 2500mm² board) | θJA | 54 | °C/W | Topside 100 mm², backside 2500 mm², board area 2500 mm² | 20 | ||
| Junction-to-Ambient Thermal Resistance (50mm² topside, 2500mm² backside, 2500mm² board) | θJA | 60 | °C/W | Topside 50 mm², backside 2500 mm², board area 2500 mm² | 20 | ||
| Junction-to-Case Thermal Resistance | θJC | 20 | °C/W | DC package | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | COPPER | Table 2. DC Package, 8-Lead DFN COPPER AREA | 20 |
CAD (KiCad official)
- Symbol:
LT3060IDC#TRPBF - Footprint:
Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm - 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
lt3060idc-trpbf-etched.step/lt3060idc-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt3060idc-trpbf.step/lt3060idc-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (26 pp, sha256
4f8ff67718dd9090, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LT3060IDC#TRPBF
**Analog Devices** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-8-EP(2x2)
LT3060IDC#TRPBF from Analog Devices, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF/BYP | passive | A single capacitor from this pin to GND bypasses the reference noise and soft-starts the reference, with a 10nF bypass typically reducing output noise to 30µVRMS over 10Hz to 100kHz; the pin is pulled low in shutdown and must not be driven by active circuitry, and it must be left floating if low noise or soft-start is not needed. |
| 2 | ADJ | input | This is the inverting input of the error amplifier, regulated to 600mV referenced to GND, with a typical bias current of 15nA flowing out of the pin, and a capacitor from ADJ to OUT is used for noise and transient improvement above 600mV; for fixed-voltage versions it must be left floating. |
| 3 | OUT | power_out | Output pin that supplies the load, requiring a minimum 2.2µF ceramic output capacitor for stability, with a permissible output voltage range of 600mV to 44.5V. |
| 4 | OUT | power_out | Output pin that supplies the load, requiring a minimum 2.2µF ceramic output capacitor for stability, with a permissible output voltage range of 600mV to 44.5V. |
| 5 | IN | power_in | Input pin that supplies power to the device over an input range of 1.6V to 45V, with a 1µF to 10µF input bypass capacitor recommended and an IN pin voltage rating of ±50V absolute maximum. |
| 6 | IN | power_in | Input pin that supplies power to the device over an input range of 1.6V to 45V, with a 1µF to 10µF input bypass capacitor recommended and an IN pin voltage rating of ±50V absolute maximum. |
| 7 | SHDN | input | Shutdown input where pulling it low puts the device into a low-power state and turns the output off; it cannot be driven below GND unless tied to IN, the device does not function if left unconnected, and it should be tied to IN if unused. |
| 8 | GND | power_in | Ground pin; for the adjustable LT3060 the bottom of the output divider resistor should connect directly to this GND, and pin 8 must be tied to exposed pad pin 9 and the PCB ground. |
| 9 | GND | power_in | Exposed pad that is GND and must be soldered to the PCB, tied directly to pin 8 and the PCB ground to provide the enhanced thermal performance. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | DFN-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| IN Pin Voltage | | -50 | | 50 | V | | 2 |
| OUT Pin Voltage | | -50 | | 50 | V | | 2 |
| Input-to-Output Differential Voltage | | -50 | | 50 | V | Note 2 | 2 |
| ADJ Pin Voltage | | -50 | | 50 | V | | 2 |
| SHDN Pin Voltage | | -50 | | 50 | V | | 2 |
| REF/BYP Pin Voltage | | -0.3 | | 1 | V | Note 1 | 2 |
| Operating Junction Temperature (E-, I-Grades) | TJ | -40 | | 125 | °C | E-, I-Grades | 2 |
| Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Input Voltage Range | VIN | 1.6 | | 45 | V | | 1 |
| Output Voltage Range (adjustable) | VOUT | 0.6 | | 44.5 | V | Permissible output voltage range | 15 |
| Output Current | IOUT | | | 100 | mA | | 1 |
| Output Capacitor | COUT | 2.2 | | | µF | Ceramic, ESR of 3Ω or less | 18 |
| Input Bypass Capacitor | CIN | 1 | | 10 | µF | | 15 |
| Junction-to-Ambient Thermal Resistance (DC package) | θJA | 48 | | 60 | °C/W | * SEE APPLICATIONS INFORMATION SECTION | 2 |
| Maximum Junction Temperature (DC package) | TJMAX | | | 125 | °C | DC package | 2 |
| Minimum Input Voltage | | | 1.6 | 2.1 | V | ILOAD = 100mA (Notes 4, 12) | 4 |
| ADJ Pin Voltage | | 594 | 600 | 606 | mV | VIN = 2.1V, ILOAD = 1mA | 4 |
| ADJ Pin Voltage | | 588 | 600 | 612 | mV | 2.1V < VIN < 45V, 1mA < ILOAD < 100mA (E-, I-Grades) | 4 |
| Line Regulation | | | 0.6 | 3.5 | mV | ΔVIN = 2.1V to 45V, ILOAD = 1mA (E-, I-Grades) (Note 4) | 4 |
| Load Regulation | | | 0.2 | 4 | mV | VIN = 2.1V, ILOAD = 1mA to 100mA (E-, I-Grades) (Note 4) | 5 |
| Dropout Voltage | | | 75 | 110 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA | 5 |
| Dropout Voltage | | | | 180 | mV | VIN = VOUT(NOMINAL), ILOAD = 1mA, l (full operating temperature range) | 5 |
| Dropout Voltage | | | 150 | 200 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA | 5 |
| Dropout Voltage | | | | 300 | mV | VIN = VOUT(NOMINAL), ILOAD = 10mA, l (full operating temperature range) | 5 |
| Dropout Voltage | | | 240 | 280 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14) | 5 |
| Dropout Voltage | | | | 410 | mV | VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 14), l (full operating temperature range) | 5 |
| Dropout Voltage | | | 300 | 350 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14) | 5 |
| Dropout Voltage | | | | 510 | mV | VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 14), l (full operating temperature range) | 5 |
| GND Pin Current | | | 40 | 80 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 0µA (Notes 6, 8) | 5 |
| GND Pin Current | | | 60 | 100 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 1mA (Notes 6, 8) | 5 |
| GND Pin Current | | | 160 | 350 | µA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 10mA (Notes 6, 8) | 5 |
| GND Pin Current | | | 0.8 | 1.8 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 50mA (Notes 6, 8) | 5 |
| GND Pin Current | | | 2 | 4 | mA | VIN = VOUT(NOMINAL) + 0.55V, ILOAD = 100mA (Notes 6, 8) | 5 |
| Quiescent Current in Shutdown | | | 0.3 | 1 | µA | VIN = 45V, VSHDN = 0V | 5 |
| ADJ Pin Bias Current | | | 15 | 60 | nA | VIN = 2.1V (Note 9) | 5 |
| Shutdown Threshold (OFF to ON) | | 0.3 | | 0.8 | V | VOUT = Off to On | 5 |
| Shutdown Threshold (ON to OFF) | | 0.7 | | 1.5 | V | VOUT = On to Off | 5 |
| SHDN Pin Current | | | 0.9 | | µA | VSHDN = 0V (Note 10) | 5 |
| SHDN Pin Current | | | 1 | 3 | µA | VSHDN = 45V (Note 10) | 5 |
| Ripple Rejection | | 70 | 85 | | dB | VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 100mA; VIN = 2.1V (Avg) (Note 4) | 5 |
| Current Limit | | 110 | 200 | | mA | VIN = VOUT(NOMINAL) + 1V (Notes 6, 12), ΔVOUT = -5%, l | 5 |
| Input Reverse Leakage Current | | | | 300 | µA | VIN = -45V, VOUT = 0, l | 6 |
| Reverse Output Current | | | 0.2 | 10 | µA | VOUT = 1.2V, VIN = 0V (Note 11) | 6 |
| Junction-to-Ambient Thermal Resistance (2500mm² topside, 2500mm² backside, 2500mm² board) | θJA | | 48 | | °C/W | Topside 2500 mm², backside 2500 mm², board area 2500 mm² | 20 |
| Junction-to-Ambient Thermal Resistance (1000mm² topside, 2500mm² backside, 2500mm² board) | θJA | | 49 | | °C/W | Topside 1000 mm², backside 2500 mm², board area 2500 mm² | 20 |
| Junction-to-Ambient Thermal Resistance (225mm² topside, 2500mm² backside, 2500mm² board) | θJA | | 50 | | °C/W | Topside 225 mm², backside 2500 mm², board area 2500 mm² | 20 |
| Junction-to-Ambient Thermal Resistance (100mm² topside, 2500mm² backside, 2500mm² board) | θJA | | 54 | | °C/W | Topside 100 mm², backside 2500 mm², board area 2500 mm² | 20 |
| Junction-to-Ambient Thermal Resistance (50mm² topside, 2500mm² backside, 2500mm² board) | θJA | | 60 | | °C/W | Topside 50 mm², backside 2500 mm², board area 2500 mm² | 20 |
| Junction-to-Case Thermal Resistance | θJC | | 20 | | °C/W | DC package | 2 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | COPPER | | Table 2. DC Package, 8-Lead DFN COPPER AREA | 20 |
## CAD (KiCad official)
- Symbol: `LT3060IDC#TRPBF`
- Footprint: `Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm`
- 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `lt3060idc-trpbf-etched.step` / `lt3060idc-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lt3060idc-trpbf.step` / `lt3060idc-trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588914256293343232) (26 pp, sha256 `4f8ff67718dd9090`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lt3060idc-trpbf-datasheet.pdf)