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LT3055IMSE#PBF

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Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-16-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LT3055IMSE#PBF

Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-16-EP

LT3055IMSE#PBF from Analog Devices, in a MSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Supply input that withstands reverse input voltage without reverse current, and a 1µF to 10µF local bypass capacitor is recommended if the input is more than six inches from the main filter capacitor.
2 IN power_in Supply input, paired with pin 1, that withstands reverse input voltage without reverse current, and a 1µF to 10µF local bypass capacitor is recommended if the input is more than six inches from the main filter capacitor.
3 SHDN input Shutdown input that puts the device into a low-power state and turns the output off when pulled low, and it must be connected (to IN if unused) because the device does not function when it is left unconnected.
4 FAULT1 output Open-collector fault output that asserts low when output current drops below the minimum current threshold or the part is in thermal shutdown, sinks up to 50µA, and requires an external pull-up resistor.
5 FAULT2 output Open-collector fault output that asserts low when output current exceeds the current limit threshold or the part is in thermal shutdown, sinks up to 50µA, and requires an external pull-up resistor.
6 PWRGD output Open-collector power-good output that pulls low when the output is less than 90% of its nominal value, sinks up to 50µA, and requires an external pull-up resistor.
7 TEMP output Analog output of average junction temperature at 250mV for 25°C with a 10mV/°C slope and approximately 1500Ω output impedance, stable with no capacitor or 100pF to 1nF, and left unconnected if not used.
8 IMON output Output current monitor, the collector of a PNP mirror at 1/500th of the output current, requiring at least 22nF decoupling and tied to GND if not used.
9 IMIN passive Minimum output current programming pin, the collector of a PNP mirror at 1/2000th of load current, where a resistor to GND sets the fault threshold, at least 10nF decoupling is required, and it is floated if not used.
10 IMAX passive Precision current limit programming pin, the collector of a mirror PNP at 1/500th of the output PNP, where a resistor to GND sets the current limit, a 22nF decoupling capacitor to ground is required, and it is tied to GND if not used.
11 REF/BYP passive Bypass and soft-start pin for the reference, where a capacitor to GND reduces noise (10nF gives 25µVRMS) and sets soft-start time, it must not be driven by active circuitry, at least 100pF is recommended, and it is left floating if unused.
12 GND power_in Ground pin that must be tied directly to pins 13 and the exposed pad 17, and the bottom of the output voltage setting divider should connect here for optimum load regulation.
13 GND power_in Ground pin on the LT3055 adjustable part that must be tied directly to pins 12 and the exposed pad 17 (on LT3055-3.3 and LT3055-5 this pin is ADJ instead).
14 ADJ input Adjust pin on the LT3055 that is the error amplifier inverting input, with a typical 16nA bias current flowing out of the pin and a 600mV reference to GND, where a feedforward capacitor from ADJ to OUT improves noise and transient response above 600mV.
15 OUT power_out Output pin supplying the load, requiring a minimum 3.3µF ceramic capacitor with ESR below 1Ω (4.7µF for outputs below 1.2V), with a permissible output range of 600mV to 40V.
16 OUT power_out Output pin supplying the load, paired with pin 15, requiring a minimum 3.3µF ceramic capacitor with ESR below 1Ω (4.7µF for outputs below 1.2V), with a permissible output range of 600mV to 40V.
17 GND power_in Exposed pad that is an electrical and thermal connection to GND and must be soldered to the PCB ground and tied to pins 12 and 13.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-16-EP
Category Power Management (PMIC)
Pins 17

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Input Voltage 1.6 2.2 V ILOAD = 500mA 4
ADJ Pin Voltage 594 600 606 mV LT3055: VIN = 2.2V, ILOAD = 1mA 4
ADJ Pin Voltage 588 600 612 mV 2.2V < VIN < 45V, 10mA < ILOAD < 500mA, full operating temperature range (l) 4
Line Regulation 0.25 3 mV LT3055: dVIN = 2.2V to 45V, ILOAD = 1mA 4
Load Regulation 0.5 4 mV LT3055: VIN = 2.2V, ILOAD = 1mA to 500mA 4
Dropout Voltage 140 175 mV ILOAD = 10mA 4
Dropout Voltage 260 mV ILOAD = 10mA, full operating temperature range (l) 4
Dropout Voltage 200 250 mV ILOAD = 50mA 4
Dropout Voltage 370 mV ILOAD = 50mA, full operating temperature range (l) 4
Dropout Voltage 225 275 mV ILOAD = 100mA 4
Dropout Voltage 410 mV ILOAD = 100mA, full operating temperature range (l) 4
Dropout Voltage 350 400 mV ILOAD = 500mA 4
Dropout Voltage 590 mV ILOAD = 500mA, full operating temperature range (l) 4
GND Pin Current 65 130 μA VIN = VOUT(NOMINAL) + 0.6V, ILOAD = 0mA 4
GND Pin Current 100 200 μA VIN = VOUT(NOMINAL) + 0.6V, ILOAD = 1mA 4
GND Pin Current 270 550 μA VIN = VOUT(NOMINAL) + 0.6V, ILOAD = 10mA 4
GND Pin Current 1.8 4.5 mA VIN = VOUT(NOMINAL) + 0.6V, ILOAD = 100mA 4
GND Pin Current 11 25 mA VIN = VOUT(NOMINAL) + 0.6V, ILOAD = 500mA 4
Quiescent Current in Shutdown 0.2 1 μA VIN = 45V, VSHDN = 0V 4
ADJ Pin Bias Current 16 60 nA VIN = 12V, full operating temperature range (l) 4
Shutdown Threshold (Off to On) 0.9 1.3 V VOUT = Off to On, full operating temperature range (l) 4
Shutdown Threshold (On to Off) 1.1 1.42 V VOUT = On to Off, full operating temperature range (l) 4
SHDN Pin Current 0.5 1 μA VSHDN = 0V, VIN = 45V, full operating temperature range (l) 4
SHDN Pin Current 3 µA VSHDN = 45V, VIN = 45V, full operating temperature range (l) 4
Ripple Rejection (LT3055, VOUT = 0.6V) 70 85 dB VIN-VOUT = 2V, VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA 4
Input Reverse Leakage Current 300 μA VIN = -45V, VOUT = 0, full operating temperature range (l) 4
Reverse Output Current 0 10 μA VOUT = 1.2V, VIN = 0 4
Internal Current Limit 900 mA VIN = 2.2V, VOUT = 0, VIMAX = 0 4
Internal Current Limit 520 mA VIN = 2.2V, dVOUT = -5%, full operating temperature range (l) 4
External Programmed Current Limit (FAULT2 Pin Threshold) IFAULT 180 200 220 mA 5.6V < VIN < 10V, VOUT = 5V, RIMAX = 1.5k, full operating temperature range (l) 4
External Programmed Current Limit (FAULT2 Pin Threshold) IFAULT 445 495 545 mA 5.6V < VIN < 7V, VOUT = 5V, RIMAX = 604Ω, full operating temperature range (l) 4
FAULT, PWRGD Pins Logic Low Voltage 0.14 0.25 V Pull-Up Current = 50μA, full operating temperature range (l) 5
FAULT, PWRGD Pins Leakage Current 0.01 1 μA VFAULT1, VFAULT2, VPWRGD = 5V 5
IMIN Threshold Accuracy 0.9 1 1.1 mA 5.6V < VIN < 15V, VOUT = 5V, RIMIN = 1.2M, full operating temperature range (l) 5
IMIN Threshold Accuracy 9 10 11 mA 5.6V < VIN < 15V, VOUT = 5V, RIMIN = 120K, full operating temperature range (l) 5
PWRGD Trip Point 86 90 94 % % of Nominal Output Voltage, Output Rising, full operating temperature range (l) 5
Current Monitor Ratio (IOUT/IMON) 450 500 550 mA/mA ILOAD = 10mA, 250mA, 500mA, full operating temperature range (l) 5
TEMP Error -0.08 0.08 V full operating temperature range (l) 5
IN Pin Voltage -50 50 V 2
OUT Pin Voltage -50 40 V 2
Input-to-Output Differential Voltage -40 50 V 2
ADJ Pin Voltage -50 50 V 2
SENSE Pin Voltage -50 50 V 2
SHDN Pin Voltage -50 50 V 2
FAULT1, FAULT2, PWRGD Pin Voltage -0.3 50 V 2
IMON Pin Voltage -0.3 7 V 2
IMIN Pin Voltage -0.3 7 V 2
IMAX Pin Voltage -0.3 7 V 2
TEMP Pin Voltage -0.3 7 V 2
REF/BYP Pin Voltage 1 V 2
Storage Temperature Range -65 150 °C 2
Operating Junction Temperature Range (I-Grade) -40 125 °C I-grade (LT3055IMSE) 2
Input Voltage Range 1.6 45 V 1
Thermal Resistance, Junction-to-Ambient (MSE package) θJA 37 °C/W MSE package, 16-lead MSOP 2
Thermal Resistance, Junction-to-Case (MSE package) θJC 5 10 °C/W MSE package, printed as 5°C/W TO 10°C/W 2
MSOP Measured Thermal Resistance (2500 sq mm copper, topside and backside) 35 °C/W Junction-to-ambient, 2500 sq mm topside copper, 2500 sq mm backside, 2500 sq mm board area, 4-layer FR-4 21
MSOP Measured Thermal Resistance (100 sq mm copper, topside) 39 °C/W Junction-to-ambient, 100 sq mm topside copper, 2500 sq mm backside, 2500 sq mm board area, 4-layer FR-4 21

CAD (KiCad official)

  • Symbol: LT3055IMSE#PBF
  • Footprint: Package_SO:MSOP-16-1EP_3x4.039mm_P0.5mm_EP1.651x2.845mm
  • 3D model: MSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: lt3055imse-pbf-etched.step / lt3055imse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3055imse-pbf.step / lt3055imse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (26 pp, sha256 9eb7948800120b95, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF