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Ray Publish 0.1.0 6a0b33b 5d ago

LT3045HMSE#PBF

Analog Devices · Linear Voltage Regulators (LDO) · MSOP-12-EP

LT3045HMSE#PBF from Analog Devices, in a MSOP-12-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input pin that supplies power to the regulator, withstands reverse voltage relative to GND, OUTS and OUT, and needs a bypass capacitor (4.7µF generally suffices), with IN absolute maximum voltage of ±22V.
2 IN power_in Input pin that supplies power to the regulator, withstands reverse voltage relative to GND, OUTS and OUT, and needs a bypass capacitor (4.7µF generally suffices), with IN absolute maximum voltage of ±22V.
3 IN power_in Input pin that supplies power to the regulator, withstands reverse voltage relative to GND, OUTS and OUT, and needs a bypass capacitor (4.7µF generally suffices), with IN absolute maximum voltage of ±22V.
4 EN/UV input Enable/UVLO pin; pulling it low places the part in shutdown with quiescent current below 1µA, and it turns on with a 1.24V rising threshold and 130mV hysteresis, with absolute maximum voltage of ±22V; do not float it.
5 PG output Open-collector power good flag that pulls low when PGFB is below 300mV, must not be driven more than 0.3V below GND, and should be left floating if power good is not used.
6 ILIM passive Current limit programming pin where a resistor to GND sets the limit with a 150mA·kΩ scale factor, and the pin also monitors current over a 0V to 300mV range; tie to GND if unused and do not drive it more than 0.3V below GND.
7 PGFB input Power good feedback pin where PG goes high above 300mV with 7mV falling hysteresis, it also enables fast start-up, and it must not be driven more than 0.3V below GND; absolute maximum voltage is -0.3V to 22V.
8 SET input Inverting input of the error amplifier and regulation set-point, sourcing a precision 100µA through an external resistor to GND so that VOUT = ISET · RSET over a 0V to 15V output range, with SET voltage limit of -0.3V to 16V.
9 GND power_in Ground pin that must be tied directly to the exposed backside pad, which must be soldered to the PCB ground for proper electrical and thermal performance.
10 OUTS input Output sense non-inverting input to the error amplifier, to be Kelvin connected directly to the output capacitor and load, and must not be driven more than 0.3V below GND; OUTS absolute maximum voltage is -0.3V to 16V.
11 OUT power_out Output pin that supplies power to the load and requires a minimum 10µF output capacitor with ESR below 20mΩ and ESL below 2nH for stability, with OUT absolute maximum voltage of -0.3V to 16V.
12 OUT power_out Output pin that supplies power to the load and requires a minimum 10µF output capacitor with ESR below 20mΩ and ESL below 2nH for stability, with OUT absolute maximum voltage of -0.3V to 16V.
13 GND power_in Exposed pad connected electrically to GND that must be soldered to the PCB ground and tied directly to the GND pin for proper electrical and thermal performance.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-12-EP
Category Power Management ICs
Pins 13

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range 2 20 V 3
Output Voltage Range 0 15 V VIN > VOUT 3
Operating Junction Temperature Range (H-Grade) TJ -40 150 °C H-Grade 2
IN Pin Voltage (absolute maximum) VIN -22 22 V IN pin voltage 2
EN/UV Pin Voltage (absolute maximum) VEN/UV -22 22 V EN/UV pin voltage 2
IN-to-EN/UV Differential -22 22 V 2
PG Pin Voltage -0.3 22 V Note 10 2
ILIM Pin Voltage -0.3 1 V Note 10 2
PGFB Pin Voltage -0.3 22 V Note 10 2
SET Pin Voltage -0.3 16 V Note 10 2
SET Pin Current -20 20 mA Note 7 2
OUTS Pin Voltage -0.3 16 V Note 10 2
OUTS Pin Current -20 20 mA Note 7 2
OUT Pin Voltage -0.3 16 V Note 10 2
OUT-to-OUTS Differential -1.2 1.2 V Note 14 2
IN-to-OUT Differential -22 22 V 2
IN-to-OUTS Differential -22 22 V 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 Sec) 300 °C MSE package 2
Minimum IN Pin Voltage 1.78 2 V ILOAD = 500mA, VIN UVLO Rising 3
SET Pin Current (ISET) ISET 99 100 101 µA VIN = 2V, ILOAD = 1mA, VOUT = 1.3V 3
SET Pin Current (ISET) ISET 98 100 102 µA 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) 3
Output Offset Voltage VOS (VOUT, VSET) -1 1 mV VIN = 2V, ILOAD = 1mA, VOUT = 1.3V 3
Output Offset Voltage VOS (VOUT, VSET) -2 2 mV 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) 3
Line Regulation: ∆ISET ∆ISET -2 0.5 2 nA/V VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V 3
Line Regulation: ∆VOS ∆VOS -3 0.5 3 µV/V VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V (Note 4) 3
Load Regulation: ∆VOS ∆VOS 0.1 0.5 mV ILOAD = 1mA to 500mA, VIN = 2V, VOUT = 1.3V (Note 4) 3
Dropout Voltage 260 450 mV ILOAD = 500mA (Note 5) 3
GND Pin Current 2.2 mA VIN = VOUT(NOMINAL), ILOAD = 10µA (Note 6) 3
GND Pin Current 2.4 4 mA VIN = VOUT(NOMINAL), ILOAD = 1mA (Note 6) 3
GND Pin Current 3.5 5.5 mA VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 6) 3
GND Pin Current 4.3 7 mA VIN = VOUT(NOMINAL), ILOAD = 100mA (Note 6) 3
GND Pin Current 15 25 mA VIN = VOUT(NOMINAL), ILOAD = 500mA (Note 6) 3
EN/UV Pin Threshold 1.18 1.24 1.32 V EN/UV Trip Point Rising (Turn-On), VIN = 2V 3
EN/UV Pin Hysteresis 130 mV EN/UV Trip Point Hysteresis, VIN = 2V 3
EN/UV Pin Current -1 1 µA VEN/UV = 20V, VIN = 0V 4
Quiescent Current in Shutdown (H-/MP-Grade) 20 µA VIN = 6V, TJ ≤ 150°C (H-/MP-Grade) 4
Internal Current Limit 570 710 850 mA VIN = 2V, VOUT = 0V 4
PGFB Trip Point 291 300 309 mV PGFB Trip Point Rising 4
PGFB Hysteresis 7 mV PGFB Trip Point Hysteresis 4
PGFB Pin Current 25 nA VIN = 2V, VPGFB = 300mV 4
PG Output Low Voltage 30 100 mV IPG = 100µA 4
PG Leakage Current 1 µA VPG = 20V 4
Reverse Input Current 100 µA VIN = -20V, VEN/UV = 0V, VOUT = 0V, VSET = 0V 4
Reverse Output Current 14 25 µA VIN = 0, VOUT = 5V, SET = Open 4
Minimum Load Required 10 µA VOUT < 1V 4
Thermal Shutdown 165 °C TJ Rising 4
Thermal Shutdown Hysteresis 8 °C 4
Thermal Resistance Junction-to-Ambient θJA 33 °C/W MSE package, measured with 2500mm2 copper area 2
Thermal Resistance Junction-to-Case θJC 8 °C/W MSE package 2

CAD (KiCad official)

  • Symbol: LT3045HMSE#PBF
  • Footprint: Package_SO:MSOP-12-1EP_3x4.039mm_P0.65mm_EP1.651x2.845mm
  • 3D model: MSOP-12-EP (KiCad packages3D, STEP)
  • 3D model files: lt3045hmse-pbf-etched.step / lt3045hmse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3045hmse-pbf.step / lt3045hmse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (32 pp, sha256 9132e595759a58a0, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF