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LT3045EMSE#PBF

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Analog Devices Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, MSOP-12-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LT3045EMSE#PBF

Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · MSOP-12-EP

LT3045EMSE#PBF from Analog Devices, in a MSOP-12-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin that powers the regulator, requires a bypass capacitor (4.7µF generally suffices), and withstands reverse voltages relative to GND, OUTS and OUT.
2 IN power_in Input supply pin that powers the regulator, requires a bypass capacitor (4.7µF generally suffices), and withstands reverse voltages relative to GND, OUTS and OUT.
3 IN power_in Input supply pin that powers the regulator, requires a bypass capacitor (4.7µF generally suffices), and withstands reverse voltages relative to GND, OUTS and OUT.
4 EN/UV input Enable/UVLO pin that shuts the part down when pulled low, turns on at 1.24V rising with 130mV hysteresis, and must not be left floating (tie to IN if unused).
5 PG output Open-collector power good flag that pulls low when PGFB is below 300mV, may be floated if unused, and must not be driven more than 0.3V below GND.
6 ILIM output Current limit programming pin where a resistor to GND sets the limit (150mA•kΩ scale factor) and which also sources a 1:500 current monitor signal in a 0V to 300mV range; tie to GND if unused.
7 PGFB input Power good feedback pin where PG goes high when PGFB rises above 300mV (7mV falling-edge hysteresis), and tying it to IN disables power good and fast start-up.
8 SET input Error amplifier inverting input and set-point pin that sources a precision 100µA through an external resistor to GND, giving VOUT = ISET • RSET over a 0V to 15V output range.
9 GND power_in Ground pin that must be tied directly to the exposed backside pad, which is soldered to the PCB ground.
10 OUTS input Output sense pin, the non-inverting error amplifier input, that should be Kelvin-connected directly to the output capacitor and load and must not be driven more than 0.3V below GND.
11 OUT power_out Output pin that supplies power to the load and requires a minimum 10µF output capacitor with ESR below 20mΩ and ESL below 2nH for stability.
12 OUT power_out Output pin that supplies power to the load and requires a minimum 10µF output capacitor with ESR below 20mΩ and ESL below 2nH for stability.
13 GND power_in Exposed backside pad that is the electrical GND connection and must be soldered to the PCB ground and tied directly to the GND pin.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package MSOP-12-EP
Category Power Management (PMIC)
Pins 13

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 2 20 V 3
Output Voltage Range VOUT 0 15 V VIN > VOUT 3
Minimum IN Pin Voltage 1.78 2 V ILOAD = 500mA, VIN UVLO Rising 3
SET Pin Current ISET 99 100 101 µA VIN = 2V, ILOAD = 1mA, VOUT = 1.3V 3
SET Pin Current ISET 98 100 102 µA 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) 3
Output Offset Voltage VOS (VOUT, VSET) VOS -1 1 mV VIN = 2V, ILOAD = 1mA, VOUT = 1.3V 3
Output Offset Voltage VOS (VOUT, VSET) VOS -2 2 mV 2V < VIN < 20V, 0V < VOUT < 15V, 1mA < ILOAD < 500mA (Note 3) 3
Line Regulation ISET ISET -2 0.5 2 nA/V VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V 3
Line Regulation VOS VOS -3 0.5 3 µV/V VIN = 2V to 20V, ILOAD = 1mA, VOUT = 1.3V (Note 4) 3
Load Regulation VOS VOS 0.1 0.5 mV ILOAD = 1mA to 500mA, VIN = 2V, VOUT = 1.3V (Note 4) 3
Change in ISET with VSET ISET 30 400 nA VSET = 1.3V to 15V, VIN = 20V, ILOAD = 1mA 3
Change in VOS with VSET VOS 0.03 0.6 mV VSET = 1.3V to 15V, VIN = 20V, ILOAD = 1mA (Note 4) 3
Change in ISET with VSET ISET 150 600 nA VSET = 0V to 1.3V, VIN = 20V, ILOAD = 1mA 3
Change in VOS with VSET VOS 0.3 2 mV VSET = 0V to 1.3V, VIN = 20V, ILOAD = 1mA (Note 4) 3
Dropout Voltage 220 275 330 mV ILOAD = 1mA, 50mA 3
Dropout Voltage 220 280 350 mV ILOAD = 300mA (Note 5) 3
Dropout Voltage 260 350 450 mV ILOAD = 500mA (Note 5) 3
GND Pin Current 2.2 4 mA VIN = VOUT(NOMINAL), ILOAD = 10µA (Note 6) 3
GND Pin Current 2.4 5.5 mA VIN = VOUT(NOMINAL), ILOAD = 1mA (Note 6) 3
GND Pin Current 3.5 7 mA VIN = VOUT(NOMINAL), ILOAD = 50mA (Note 6) 3
GND Pin Current 15 25 mA VIN = VOUT(NOMINAL), ILOAD = 500mA (Note 6) 3
EN/UV Pin Threshold (Trip Point Rising, Turn-On) 1.18 1.24 1.32 V EN/UV Trip Point Rising (Turn-On), VIN = 2V 3
EN/UV Pin Current -1 0.03 1 µA VEN/UV = 0V, VIN = 20V 4
EN/UV Pin Current 8 15 µA VEN/UV = 1.24V, VIN = 20V 4
Quiescent Current in Shutdown (VEN/UV = 0V) 0.3 1 µA VIN = 6V, TJ ≤ 125°C (E/I-Grade) 4
Programmable Current Limit Programming Scale Factor 450 500 550 mA•kΩ 2V < VIN < 20V (Note 11) 4
Programmable Current Limit 90 100 110 mA VIN = 2V, VOUT = 0V, RILIM = 1.5kΩ 4
PGFB Trip Point Rising 291 300 309 mV PGFB Trip Point Rising 4
PG Output Low Voltage 30 100 mV IPG = 100µA 4
PG Leakage Current 1 µA VPG = 20V 4
Reverse Input Current 100 µA VIN = -20V, VEN/UV = 0V, VOUT = 0V, VSET = 0V 4
Reverse Output Current 14 25 µA VIN = 0, VOUT = 5V, SET = Open 4
IN Pin Voltage -22 22 V 2
EN/UV Pin Voltage -22 22 V 2
IN-to-EN/UV Differential -22 22 V 2
PG Pin Voltage -0.3 22 V Note 10 2
ILIM Pin Voltage -0.3 1 V Note 10 2
PGFB Pin Voltage -0.3 22 V Note 10 2
SET Pin Voltage -0.3 16 V Note 10 2
SET Pin Current -20 20 mA Note 7 2
OUTS Pin Voltage -0.3 16 V Note 10 2
OUTS Pin Current -20 20 mA Note 7 2
OUT Pin Voltage -0.3 16 V Note 10 2
OUT-to-OUTS Differential -1.2 1.2 V Note 14 2
IN-to-OUT Differential -22 22 V 2
IN-to-OUTS Differential -22 22 V 2
Operating Junction Temperature Range (E-Grade, I-Grade) -40 125 °C Note 9; E-Grade and I-Grade 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 Sec) MSE Package 300 °C 10 s soldering, MSE package 2
Maximum Junction Temperature TJMAX 150 °C MSE (12-lead MSOP) package 2
Junction-to-Ambient Thermal Resistance θJA 33 °C/W MSE (12-lead MSOP) package, as printed in package header 2
Junction-to-Case Thermal Resistance θJC 8 °C/W MSE (12-lead MSOP) package, as printed in package header 2
Measured Thermal Resistance, MSOP (100mm² copper area) 35 °C/W Table 4: 100mm² copper area, 2500mm² board area, device mounted on topside 22

CAD (KiCad official)

  • Symbol: LT3045EMSE#PBF
  • Footprint: Package_SO:MSOP-12-1EP_3x4.039mm_P0.65mm_EP1.651x2.845mm
  • 3D model: MSOP-12-EP (KiCad packages3D, STEP)
  • 3D model files: lt3045emse-pbf-etched.step / lt3045emse-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt3045emse-pbf.step / lt3045emse-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (32 pp, sha256 79a19c48f10093eb, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF