component
LT1965IMS8E-3.3#PBF
Public Made by Adomby adom
Analog Devices Linear Voltage Regulators (LDO), MSOP-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownLT1965IMS8E-3.3#PBF
Analog Devices · Linear Voltage Regulators (LDO) · MSOP-8-EP
LT1965IMS8E-3.3#PBF from Analog Devices, in a MSOP-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Output pin supplies power to the load and requires a minimum output capacitor of 10µF to prevent oscillations. |
| 2 | OUT | power_out | Output pin supplies power to the load and requires a minimum output capacitor of 10µF to prevent oscillations. |
| 3 | SENSE | input | For the fixed-voltage LT1965-3.3 this is the error amplifier input; connect to OUT for optimum regulation, with a SENSE pin bias current of 100µA at the nominal output voltage. |
| 4 | GND | power_in | Ground pin, to be tied to pin 5, pin 9 and the PCB ground. |
| 5 | GND | power_in | Ground pin, to be tied to pin 4, pin 9 and the PCB ground. |
| 6 | SHDN | input | Pulling SHDN low puts the device into a low power state and turns the output off, with SHDN pin current typically less than 5.5µA and no drive below GND unless tied to IN. |
| 7 | IN | power_in | Input pin supplies power to the device; a bypass capacitor of 1µF to 10µF suffices, and the pin withstands reverse voltages. |
| 8 | IN | power_in | Input pin supplies power to the device; a bypass capacitor of 1µF to 10µF suffices, and the pin withstands reverse voltages. |
| 9 | GND | power_in | Exposed pad is ground and must be tied directly to pins 4 and 5 and the PCB ground for enhanced thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8-EP |
| Category | Power Management ICs |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Regulated Output Voltage (VIN = 3.8V, ILOAD = 1mA) | VOUT | 3.25 | 3.3 | 3.35 | V | LT1965-3.3, VIN = 3.8V, ILOAD = 1mA | 4 |
| Regulated Output Voltage (4.3V < VIN < 20V, 1mA < ILOAD < 1.1A) | VOUT | 3.201 | 3.3 | 3.399 | V | LT1965-3.3, 4.3V < VIN < 20V, 1mA < ILOAD < 1.1A, full temperature range | 4 |
| Line Regulation | 5.5 | mV | LT1965-3.3, ∆VIN = 3.8V to 20V, ILOAD = 1mA | 4 | |||
| Load Regulation | 11.5 | 22 | mV | LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A | 4 | ||
| Load Regulation (full temperature range) | 44 | mV | LT1965-3.3, VIN = 4.3V, ∆ILOAD = 1mA to 1.1A, full temperature range | 4 | |||
| Dropout Voltage | 0.055 | 0.08 | V | VIN = VOUT(NOMINAL), ILOAD = 1mA | 4 | ||
| Dropout Voltage (full temperature range) | 0.14 | V | VIN = VOUT(NOMINAL), ILOAD = 1mA, full temperature range | 4 | |||
| Dropout Voltage | 0.12 | 0.175 | V | VIN = VOUT(NOMINAL), ILOAD = 100mA | 4 | ||
| Dropout Voltage (full temperature range) | 0.28 | V | VIN = VOUT(NOMINAL), ILOAD = 100mA, full temperature range | 4 | |||
| Dropout Voltage | 0.21 | 0.25 | V | VIN = VOUT(NOMINAL), ILOAD = 500mA | 4 | ||
| Dropout Voltage (full temperature range) | 0.36 | V | VIN = VOUT(NOMINAL), ILOAD = 500mA, full temperature range | 4 | |||
| Dropout Voltage | 0.31 | 0.36 | V | VIN = VOUT(NOMINAL), ILOAD = 1.1A (TJ < 125°C) | 4 | ||
| Dropout Voltage (H-grade / full temperature range) | 0.49 | V | VIN = VOUT(NOMINAL), ILOAD = 1.1A (TJ < 125°C) / 1A (H-Grade) | 4 | |||
| GND Pin Current | IGND | 0.5 | 1.1 | mA | VIN = VOUT(NOMINAL) + 1V, ILOAD = 0mA | 4 | |
| GND Pin Current | IGND | 0.6 | 1.5 | mA | VIN = VOUT(NOMINAL) + 1V, ILOAD = 1mA | 4 | |
| GND Pin Current | IGND | 2.2 | 5.5 | mA | VIN = VOUT(NOMINAL) + 1V, ILOAD = 100mA | 4 | |
| GND Pin Current | IGND | 8.2 | 20 | mA | VIN = VOUT(NOMINAL) + 1V, ILOAD = 500mA | 4 | |
| GND Pin Current | IGND | 21 | 40 | mA | VIN = VOUT(NOMINAL) + 1V, ILOAD = 1.1A (TJ < 125°C) | 4 | |
| Output Voltage Noise | 40 | µVRMS | COUT = 10µF, ILOAD = 1.1A, BW = 10Hz to 100kHz | 4 | |||
| SHDN Pin Current | ISHDN | 0.01 | 1 | µA | VSHDN = 0V | 5 | |
| SHDN Pin Current | ISHDN | 5.5 | 10 | µA | VSHDN = 20V | 5 | |
| Quiescent Current in Shutdown | IQ | 0.01 | 1 | µA | VIN = 6V, VSHDN = 0V | 5 | |
| Ripple Rejection | 57 | 75 | dB | VIN, VOUT = 1.5V (AVG), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 0.75A | 5 | ||
| Current Limit | 1.2 | 2.4 | A | VIN = 7V, VOUT = 0 | 5 | ||
| Current Limit (H-grade / TJ > 125°C) | 1.1 | A | VIN = VOUT(NOMINAL) + 1V, ∆VOUT = -0.1V (TJ < 125°C) | 5 | |||
| Input Reverse-Leakage Current | 1 | mA | VIN = -20V, VOUT = 0 | 5 | |||
| Reverse-Output Current | 275 | 525 | µA | LT1965-3.3, VOUT = 3.3V, VIN = 0 | 5 | ||
| IN Pin Voltage | VIN | -22 | 22 | V | 2 | ||
| OUT Pin Voltage | VOUT | -22 | 22 | V | 2 | ||
| Input to Output Differential Voltage | -22 | 22 | V | Note 2 | 2 | ||
| SENSE Pin Voltage | -22 | 22 | V | 2 | |||
| SHDN Pin Voltage | VSHDN | -22 | 22 | V | 2 | ||
| Operating Junction Temperature Range (E-, I-Grades) | TJ | -40 | 125 | °C | I-grade | 2 | |
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Maximum Junction Temperature (MSOP) | TJMAX | 125 | °C | MSOP package, E- and I-grades | 2 | ||
| Thermal Resistance Junction-to-Ambient (MSOP) | θJA | 60 | °C/W | MSOP package, EXPOSED PAD soldered to PCB | 2 | ||
| Thermal Resistance Junction-to-Case (MSOP) | θJC | 10 | °C/W | MSOP package | 2 | ||
| Measured Thermal Resistance Junction-to-Ambient (MSOP, board copper area dependent) | θJA | 55 | 68 | °C/W | MSOP, 2-layer FR-4 board, 2500mm2 to 50mm2 topside copper | 15 |
CAD (KiCad official)
- Symbol:
LT1965IMS8E-3.3#PBF - Footprint:
Package_SO:MSOP-8-1EP_3x3mm_P0.65mm_EP1.5x1.8mm - 3D model: MSOP-8-EP (KiCad packages3D, STEP)
- 3D model files:
lt1965ims8e-3-3-pbf-etched.step/lt1965ims8e-3-3-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt1965ims8e-3-3-pbf.step/lt1965ims8e-3-3-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (22 pp, sha256
070eb5a9c32d091a, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).