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LT1963AEST-2.5#PBF

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Analog Devices Linear Voltage Regulators (LDO), SOT-223-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icslt1963aest-2.5#pbffactory-2.0.0extractor-text

Verified LT1963AEST-2.5#PBF

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1963AEST-2.5#PBF · SOT-223-3 · 3 pins
  • ✓copper: 4 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 28-page datasheet
  • ✓distributor: lcsc C665697, digikey 505-LT1963AEST-2.5#PBF-ND, mouser 584-1963AEST-2.5PBF
  • ✓family: SOT-223-3_TabPin2
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-6uvsadej/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1963aest-2-5-pbf.kicad_sym✓ lt1963aest-2-5-pbf.kicad_mod✓ lt1963aest-2-5-pbf.step
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Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 8d ago
viewers lt1963aest-2-5-pbf: viewers · Ray 8d ago
lt1963aest-2-5-pbf-etched.glb Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf-etched.step lt1963aest-2-5-pbf: factory component page (tier=mfr) · Ray 8d ago
lt1963aest-2-5-pbf-hero.glb lt1963aest-2-5-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
lt1963aest-2-5-pbf-hero.overlay.json Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf.glb Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf.kicad_mod Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf.kicad_sym Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf.lbr Publish 0.1.0 · Ray 8d ago
lt1963aest-2-5-pbf.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
verification.json Verified: Published by the parts factory: tier mfr, 3 pins · Ray 8d ago

LT1963AEST-2.5#PBF

Analog Devices · Linear Voltage Regulators (LDO) · SOT-223-3

LT1963AEST-2.5#PBF from Analog Devices, in a SOT-223-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input pin through which power is supplied to the device; the datasheet recommends a 1µF to 10µF bypass capacitor if the device is more than six inches from the main input filter capacitor, and it withstands reverse input voltage with no reverse current.
2 GND power_in Ground pin; the tab is also GND.
3 OUT power_out Regulated output that supplies the load, requiring a minimum 10µF output capacitor to prevent oscillations.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOT-223-3
Category Power Management ICs
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Regulated Output Voltage VOUT 2.462 2.5 2.538 V LT1963A-2.5, VIN = 3V, ILOAD = 1mA 5
Regulated Output Voltage (full temp) VOUT 2.412 2.5 2.575 V LT1963A-2.5, 3.5V < VIN < 20V, 1mA < ILOAD < 1.5A 5
Minimum Input Voltage 1.9 V ILOAD = 0.5A 5
Minimum Input Voltage 2.1 2.5 V ILOAD = 1.5A 5
Line Regulation 3 10 mV LT1963A-2.5, ΔVIN = 3V to 20V, ILOAD = 1mA 5
Load Regulation 2.5 15 mV LT1963A-2.5, VIN = 3.5V, ΔILOAD = 1mA to 1.5A 5
Load Regulation (full temp) 30 mV LT1963A-2.5, VIN = 3.5V, ΔILOAD = 1mA to 1.5A 5
Dropout Voltage 0.02 0.06 V ILOAD = 1mA 5
Dropout Voltage (full temp) 0.1 V ILOAD = 1mA 5
Dropout Voltage 0.1 0.17 V ILOAD = 100mA 5
Dropout Voltage (full temp) 0.22 V ILOAD = 100mA 5
Dropout Voltage 0.19 0.27 V ILOAD = 500mA 5
Dropout Voltage (full temp) 0.35 V ILOAD = 500mA 5
Dropout Voltage 0.34 0.45 V ILOAD = 1.5A 5
Dropout Voltage (full temp) 0.55 V ILOAD = 1.5A 5
GND Pin Current 1 1.5 mA VIN = VOUT(NOMINAL) + 1V, ILOAD = 0mA 5
GND Pin Current 1.1 1.6 mA VIN = VOUT(NOMINAL) + 1V, ILOAD = 1mA 5
GND Pin Current 3.8 5.5 mA VIN = VOUT(NOMINAL) + 1V, ILOAD = 100mA 5
GND Pin Current 15 25 mA VIN = VOUT(NOMINAL) + 1V, ILOAD = 500mA 5
GND Pin Current 80 120 mA VIN = VOUT(NOMINAL) + 1V, ILOAD = 1.5A 5
Output Voltage Noise 40 µVRMS COUT = 10µF, ILOAD = 1.5A, BW = 10Hz to 100kHz 5
Shutdown Threshold (Off to On) 0.9 2 V VOUT = Off to On 5
Shutdown Threshold (On to Off) 0.25 0.75 V VOUT = On to Off 5
SHDN Pin Current 0.01 1 µA VSHDN = 0V 5
SHDN Pin Current 3 30 µA VSHDN = 20V 5
Quiescent Current in Shutdown 0.01 1 µA VIN = 6V, VSHDN = 0V 5
Ripple Rejection 55 63 dB VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 0.75A 6
Current Limit 2 A VIN = 7V, VOUT = 0V 6
Current Limit 1.6 A VIN = VOUT(NOMINAL) + 1V, ΔVOUT = -0.1V 6
Input Reverse Leakage Current (ST package) 2 mA ST Package VIN = -20V, VOUT = 0 6
Reverse Output Current 600 1200 µA LT1963A-2.5, VOUT = 2.5V, VIN < 2.5V 6
IN Pin Voltage -20 20 V 2
OUT Pin Voltage -20 20 V 2
Input to Output Differential Voltage -20 20 V Note 2 2
SENSE Pin Voltage -20 20 V 2
SHDN Pin Voltage -20 20 V 2
Operating Junction Temperature Range -40 125 °C LT1963AE (Note 3) 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C 2
Maximum Junction Temperature TJMAX 125 °C ST package 2
Thermal Resistance Junction-to-Ambient θJA 50 °C/W ST package, 3-lead SOT-223 2
Thermal Resistance Junction-to-Ambient θJA 42 °C/W SOT-223, 2500mm2 topside, 2500mm2 backside, 2500mm2 board area 19
Thermal Resistance Junction-to-Ambient θJA 56 °C/W SOT-223, 100mm2 topside, 2500mm2 backside, 2500mm2 board area 19
Output Capacitor (minimum) COUT 10 µF required to prevent oscillations 13
Output Capacitor ESR ESR 3 Ω maximum ESR allowable 14

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts COPPER Table 3. Q Package, 5-Lead DD COPPER AREA THERMAL RESISTANCE 19

CAD (KiCad official)

  • Symbol: LT1963AEST-2.5#PBF
  • Footprint: Package_TO_SOT_SMD:SOT-223-3_TabPin2
  • 3D model: SOT-223-3 (KiCad packages3D, STEP)
  • 3D model files: lt1963aest-2-5-pbf-etched.step / lt1963aest-2-5-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1963aest-2-5-pbf.step / lt1963aest-2-5-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (28 pp, sha256 05182936a569ba4b, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF