component

LT1813CS8#PBF

Public Made by Adom

by adom

Analog Devices Operational Amplifier, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierslt1813cs8#pbffactory-2.0.0extractor-text

Verified LT1813CS8#PBF

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1813CS8#PBF · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 16-page datasheet
  • ✓distributor: lcsc C665412, digikey LT1813CS8#PBF-ND, mouser 584-LT1813CS8#PBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-pp9_as6q/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.15)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1813cs8-pbf.kicad_sym✓ lt1813cs8-pbf.kicad_mod✓ lt1813cs8-pbf.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers lt1813cs8-pbf: viewers · Ray 3d ago
lt1813cs8-pbf-etched.glb Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf-etched.step lt1813cs8-pbf: factory component page (tier=mfr) · Ray 3d ago
lt1813cs8-pbf-hero.glb lt1813cs8-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
lt1813cs8-pbf-hero.overlay.json Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf.glb Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf.kicad_mod Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf.kicad_sym Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf.lbr Publish 0.1.0 · Ray 3d ago
lt1813cs8-pbf.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 3d ago

LT1813CS8#PBF

Analog Devices · Operational Amplifier · SO-8

LT1813CS8#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUTA output Output of amplifier A; the datasheet states it drives a 100Ω load to ±3.5V with ±5V supplies.
2 -IN A input Inverting input of amplifier A; keep the trace short, especially on this negative input lead, and balance source resistance at both inputs to limit offset error.
3 +IN A input Non-inverting input of amplifier A; inputs withstand differential voltages up to 6V without clamping, but sustained differential input will cause excessive power dissipation.
4 V- power_in Negative supply; the total supply (V+ to V-) must not exceed 12.6V for the LT1813C/I, and bypass capacitors (0.01µF ceramic) should be placed directly at this pin.
5 +IN B input Non-inverting input of amplifier B; inputs withstand differential voltages up to 6V without clamping, but sustained differential input will cause excessive power dissipation.
6 -IN B input Inverting input of amplifier B; keep the trace short, especially on this negative input lead, and balance source resistance at both inputs to limit offset error.
7 OUT B output Output of amplifier B; the datasheet states it drives a 100Ω load to ±3.5V with ±5V supplies.
8 V+ power_in Positive supply; the total supply (V+ to V-) must not exceed 12.6V for the LT1813C/I, and bypass capacitors (0.01µF ceramic) should be placed directly at this pin.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (VS=±5V) VOS 0.5 1.5 mV VS=±5V, VCM=0V, TA=25°C 3
Input Offset Voltage (VS=±5V, 0-70C) VOS 2 mV VS=±5V, VCM=0V, TA=0°C to 70°C 3
Input Offset Voltage Drift (VS=±5V, 0-70C) ∆VOS/∆T 10 15 µV/°C VS=±5V, VCM=0V, TA=0°C to 70°C 3
Input Offset Current (VS=±5V) IOS 50 400 nA VS=±5V, VCM=0V, TA=25°C 3
Input Offset Current (VS=±5V, 0-70C) IOS 500 nA VS=±5V, VCM=0V, TA=0°C to 70°C 3
Input Bias Current (VS=±5V) IB -0.9 4 µA VS=±5V, VCM=0V, TA=25°C; ±4 printed as magnitude 3
Input Resistance, Common Mode (VS=±5V) RIN 3 10 MΩ VS=±5V, VCM=3.5V 3
Input Voltage Range (VS=±5V) VCM 3.5 4.2 V VS=±5V, guaranteed by CMRR; ±3.5 printed as magnitude 3
Common Mode Rejection Ratio (VS=±5V) CMRR 75 85 dB VS=±5V, VCM=±3.5V, TA=25°C 3
Common Mode Rejection Ratio (VS=±5V, 0-70C) CMRR 73 dB VS=±5V, VCM=±3.5V, TA=0°C to 70°C 3
Power Supply Rejection Ratio (VS=±5V) PSRR 78 97 dB VS=±2V to ±5.5V, TA=25°C 3
Power Supply Rejection Ratio (VS=±5V, 0-70C) PSRR 76 dB VS=±2V to ±5.5V, TA=0°C to 70°C 3
Minimum Supply Voltage (guaranteed by PSRR) 1.25 2 V TA=25°C; ±1.25 typ, ±2 max printed as magnitude 3
Large-Signal Voltage Gain (VS=±5V, RL=500Ω) AVOL 1.5 3 V/mV VS=±5V, VOUT=±3V, RL=500Ω, TA=25°C 3
Large-Signal Voltage Gain (VS=±5V, RL=500Ω, 0-70C) AVOL 1 V/mV VS=±5V, VOUT=±3V, RL=500Ω, TA=0°C to 70°C 3
Large-Signal Voltage Gain (VS=±5V, RL=100Ω) AVOL 1 2.5 V/mV VS=±5V, VOUT=±3V, RL=100Ω, TA=25°C 3
Large-Signal Voltage Gain (VS=±5V, RL=100Ω, 0-70C) AVOL 0.7 V/mV VS=±5V, VOUT=±3V, RL=100Ω, TA=0°C to 70°C 3
Maximum Output Swing (VS=±5V, RL=500Ω) VOUT 3.8 4 V VS=±5V, RL=500Ω, 30mV overdrive, TA=25°C; ±3.8 min, ±4 typ printed as magnitude 3
Maximum Output Swing (VS=±5V, RL=500Ω, 0-70C) VOUT 3.7 V VS=±5V, RL=500Ω, 30mV overdrive, TA=0°C to 70°C 3
Maximum Output Swing (VS=±5V, RL=100Ω) VOUT 3.35 3.5 V VS=±5V, RL=100Ω, 30mV overdrive, TA=25°C; ±3.35 min, ±3.5 typ printed as magnitude 3
Maximum Output Swing (VS=±5V, RL=100Ω, 0-70C) VOUT 3.25 V VS=±5V, RL=100Ω, 30mV overdrive, TA=0°C to 70°C 3
Maximum Output Current (VS=±5V) IOUT 40 60 mA VS=±5V, VOUT=±3V, 30mV overdrive, TA=25°C; ±40 min, ±60 typ printed as magnitude 4
Output Short-Circuit Current (VS=±5V) ISC 75 100 mA VS=±5V, VOUT=0V, 1V overdrive, TA=25°C; ±75 min, ±100 typ printed as magnitude 4
Slew Rate (VS=±5V) SR 500 750 V/µs VS=±5V, AV=-1, TA=25°C 4
Slew Rate (VS=±5V, 0-70C) SR 400 V/µs VS=±5V, AV=-1, TA=0°C to 70°C 4
Gain Bandwidth Product (VS=±5V) GBW 75 100 MHz VS=±5V, f=200kHz, RL=500Ω, TA=25°C 4
Gain Bandwidth Product (VS=±5V, 0-70C) GBW 65 MHz VS=±5V, f=200kHz, RL=500Ω, TA=0°C to 70°C 4
Channel Separation (VS=±5V) 82 100 dB VS=±5V, VOUT=±3V, RL=100Ω, TA=25°C 4
Supply Current per Amplifier (VS=±5V) IS 3 3.6 mA VS=±5V, TA=25°C 4
Supply Current per Amplifier (VS=±5V, 0-70C) IS 4.5 mA VS=±5V, TA=0°C to 70°C 4
Input Offset Voltage (VS=5V single supply) VOS 0.7 2 mV VS=5V, VCM=2.5V, TA=25°C 5
Input Offset Current (VS=5V single supply) IOS 50 400 nA VS=5V, VCM=2.5V, TA=25°C 5
Input Bias Current (VS=5V single supply) IB -1 4 µA VS=5V, VCM=2.5V, TA=25°C; ±4 printed as magnitude 5
Input Resistance, Common Mode (VS=5V single supply) RIN 3 10 MΩ VS=5V, VCM=3.5V 5
Input Voltage Range, Positive (VS=5V single supply) VCM 3.5 4.2 V VS=5V, guaranteed by CMRR, TA=25°C 5
Input Voltage Range, Negative (VS=5V single supply) VCM 0.8 1.5 V VS=5V, guaranteed by CMRR, TA=25°C 5
Common Mode Rejection Ratio (VS=5V single supply) CMRR 73 82 dB VS=5V, VCM=1.5V to 3.5V, TA=25°C 5
Minimum Supply Voltage (VS=5V, guaranteed by PSRR) 2.5 4 V TA=25°C 5
Large-Signal Voltage Gain (VS=5V, RL=500Ω) AVOL 1 2 V/mV VS=5V, VOUT=1.5V to 3.5V, RL=500Ω, TA=25°C 5
Large-Signal Voltage Gain (VS=5V, RL=100Ω) AVOL 0.7 1.5 V/mV VS=5V, VOUT=1.5V to 3.5V, RL=100Ω, TA=25°C 5
Maximum Output Swing, Positive (VS=5V, RL=500Ω) VOUT 3.9 4.1 V VS=5V, RL=500Ω, 30mV overdrive, TA=25°C 5
Maximum Output Swing, Positive (VS=5V, RL=100Ω) VOUT 3.7 3.9 V VS=5V, RL=100Ω, 30mV overdrive, TA=25°C 5
Maximum Output Swing, Negative (VS=5V, RL=500Ω) VOUT 0.9 1.1 V VS=5V, RL=500Ω, 30mV overdrive, TA=25°C 5
Maximum Output Swing, Negative (VS=5V, RL=100Ω) VOUT 1.1 1.3 V VS=5V, RL=100Ω, 30mV overdrive, TA=25°C 5
Maximum Output Current (VS=5V) IOUT 25 35 mA VS=5V, VOUT=1.5V or 3.5V, 30mV overdrive, TA=25°C; ±25 min, ±35 typ printed as magnitude 6
Output Short-Circuit Current (VS=5V) ISC 55 75 mA VS=5V, VOUT=2.5V, 1V overdrive, TA=25°C; ±55 min, ±75 typ printed as magnitude 6
Slew Rate (VS=5V) SR 200 350 V/µs VS=5V, AV=-1, TA=25°C 6
Gain Bandwidth Product (VS=5V) GBW 65 94 MHz VS=5V, f=200kHz, RL=500Ω, TA=25°C 6
Channel Separation (VS=5V) 81 100 dB VS=5V, VOUT=1.5V to 3.5V, RL=100Ω, TA=25°C 6
Supply Current per Amplifier (VS=5V) IS 2.9 4 mA VS=5V, TA=25°C 6
Total Supply Voltage (V+ to V-), LT1813/LT1814 12.6 V LT1813/LT1814 (not LT1813HV) 2
Differential Input Voltage (transient only) -6 6 V Transient only, Note 2; printed ±6V 2
Operating Temperature Range -40 85 °C Printed operating temperature range 2
Storage Temperature Range (S8 package) -65 150 °C S8 package (non-DD) 2
Lead Temperature (Soldering, 10 sec) 300 °C Soldering, 10 sec 2
Maximum Junction Temperature (S8 package) TJMAX 150 °C S8 package 2
Thermal Resistance, Junction-to-Ambient (S8 package) θJA 150 °C/W S8 package; layout ambiguous, verify 2
Specified Temperature Range (C grade) 0 70 °C LT1813C guaranteed performance per Note 8 3
Specified Temperature Range (Note 8) -40 85 °C Note 8; not tested for C grade at -40C/85C 2

CAD (KiCad official)

  • Symbol: LT1813CS8#PBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1813cs8-pbf-etched.step / lt1813cs8-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1813cs8-pbf.step / lt1813cs8-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 a029683ee2078f13, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF