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LT1763CS8-5#PBF

Analog Devices · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SO-8

LT1763CS8-5#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT power_out Output supplies power to the load and requires a minimum 3.3µF output capacitor to prevent oscillations, with larger capacitors needed for large transient loads.
2 SENSE input For the fixed-voltage LT1763-5 this pin is the error amplifier input, and optimum regulation is obtained when it is connected to OUT (or to the load via a Kelvin sense connection).
3 GND power_in Ground pin; connect the bottom of the output voltage setting divider directly to the GND pins for optimum load regulation.
4 BYP passive Bypass pin clamped internally to ±0.6V, where a maximum 0.01µF capacitor from OUT reduces output noise to a typical 20µVRMS over 10Hz to 100kHz; leave unconnected if not used.
5 SHDN input Shutdown pin turns the output off when pulled low, can be driven by 5V logic or open-collector logic with a pull-up resistor, and must be connected to VIN if unused; absolute maximum pin voltage is ±20V.
6 GND power_in Ground pin that is electrically tied to the other GND pins of the package.
7 GND power_in Ground pin that is electrically tied to the other GND pins of the package.
8 IN power_in Input supply pin that withstands reverse voltage with respect to ground and OUT, with a 1µF to 10µF bypass capacitor recommended when the device is more than six inches from the main input filter; absolute maximum pin voltage is ±20V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Operating Voltage (C grade, ILOAD = 500mA) 1.8 2.3 V ILOAD = 500mA (C, I grade) 4
Regulated Output Voltage LT1763-5 4.95 5 5.05 V VIN = 5.5V, ILOAD = 1mA 4
Regulated Output Voltage LT1763-5 (full operating temperature range) 4.875 5 5.125 V 6V < VIN < 20V, 1mA < ILOAD < 500mA (l = full operating temperature range) 4
Line Regulation LT1763-5 1 5 mV ∆VIN = 5.5V to 20V, ILOAD = 1mA 4
Load Regulation LT1763-5 12 25 mV VIN = 6V, ∆ILOAD = 1mA to 500mA 4
Load Regulation LT1763-5 (full operating temperature range) 50 mV VIN = 6V, ∆ILOAD = 1mA to 500mA (l = full operating temperature range) 4
Dropout Voltage 0.13 0.19 V VIN = VOUT(NOMINAL), ILOAD = 10mA 4
Dropout Voltage (full operating temperature range) 0.25 V VIN = VOUT(NOMINAL), ILOAD = 10mA (l = full operating temperature range) 4
Dropout Voltage 0.17 0.22 V VIN = VOUT(NOMINAL), ILOAD = 50mA 4
Dropout Voltage (full operating temperature range) 0.32 V VIN = VOUT(NOMINAL), ILOAD = 50mA (l = full operating temperature range) 4
Dropout Voltage 0.2 0.24 V VIN = VOUT(NOMINAL), ILOAD = 100mA 4
Dropout Voltage (full operating temperature range) 0.34 V VIN = VOUT(NOMINAL), ILOAD = 100mA (l = full operating temperature range) 4
Dropout Voltage 0.3 0.35 V VIN = VOUT(NOMINAL), ILOAD = 500mA 4
Dropout Voltage (full operating temperature range) 0.45 V VIN = VOUT(NOMINAL), ILOAD = 500mA (l = full operating temperature range) 4
GND Pin Current 30 75 µA VIN = VOUT(NOMINAL), ILOAD = 0mA 5
GND Pin Current 65 120 µA VIN = VOUT(NOMINAL), ILOAD = 1mA 5
GND Pin Current 1.1 1.6 mA VIN = VOUT(NOMINAL), ILOAD = 50mA 5
GND Pin Current 2 3 mA VIN = VOUT(NOMINAL), ILOAD = 100mA 5
GND Pin Current 5 8 mA VIN = VOUT(NOMINAL), ILOAD = 250mA 5
GND Pin Current 11 16 mA VIN = VOUT(NOMINAL), ILOAD = 500mA 5
Output Voltage Noise 20 µVRMS COUT = 10µF, CBYP = 0.01µF, ILOAD = 500mA, BW = 10Hz to 100kHz 5
Shutdown Threshold (Off to On) 0.65 2 V VOUT = Off to On (l = full operating temperature range) 5
Shutdown Threshold (On to Off) 0.25 0.8 V VOUT = On to Off (l = full operating temperature range) 5
SHDN Pin Current 0.1 µA VSHDN = 0V 5
SHDN Pin Current 1 µA VSHDN = 20V 5
Quiescent Current in Shutdown 0.1 1 µA VIN = 6V, VSHDN = 0V 5
Ripple Rejection 50 65 dB VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 500mA 5
Current Limit 520 mA C, I Grade: VIN = VOUT(NOMINAL) + 1V or 2.3V (Note 12), ∆VOUT = -0.1V 5
Input Reverse Leakage Current 1 mA VIN = -20V, VOUT = 0V (l = full operating temperature range) 5
Reverse Output Current LT1763-5 10 20 µA VOUT = 5V, VIN < 5V 5
Input Pin Voltage IN -20 20 V 2
OUT Pin Voltage OUT -20 20 V 2
Input to Output Differential Voltage -20 20 V 2
SENSE Pin Voltage SENSE -20 20 V 2
BYP Pin Voltage BYP -0.6 0.6 V 2
SHDN Pin Voltage SHDN -20 20 V 2
Operating Junction Temperature Range TJ -40 125 °C C grade (LT1763CS8-5) 2
Storage Temperature Range TSTG -65 150 °C S8 package 2
Lead Temperature (Soldering, 10 sec) 300 °C S8 package, 10 sec 2
Maximum Junction Temperature TJMAX 150 °C S8 package 2
Thermal Resistance Junction-to-Ambient θJA 70 °C/W S8 package 2
Thermal Resistance Junction-to-Case θJC 35 °C/W S8 package 2
Thermal Resistance Junction-to-Ambient vs Copper Area θJA 60 °C/W Board area 2500mm2, topside copper 2500mm2, backside copper 2500mm2 (SO-8, still air) 17
Thermal Resistance Junction-to-Ambient vs Copper Area θJA 68 °C/W Board area 2500mm2, topside copper 225mm2, backside copper 2500mm2 (SO-8, still air) 17
Thermal Resistance Junction-to-Ambient vs Copper Area θJA 74 °C/W Board area 2500mm2, topside copper 100mm2, backside copper 2500mm2 (SO-8, still air) 17
Thermal Resistance Junction-to-Ambient vs Copper Area θJA 86 °C/W Board area 2500mm2, topside copper 50mm2, backside copper 2500mm2 (SO-8, still air) 17

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts COPPER Table 1. DE Package, 12-Lead DFN COPPER AREA 16

CAD (KiCad official)

  • Symbol: LT1763CS8-5#PBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1763cs8-5-pbf-etched.step / lt1763cs8-5-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1763cs8-5-pbf.step / lt1763cs8-5-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 2bc1aa72821928b4, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF