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LT1761IS5-SD#TRMPBF

Analog Devices · Linear Voltage Regulators (LDO) · TSOT-23-5

LT1761IS5-SD#TRMPBF from Analog Devices, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input supply pin; a 1μF to 10μF bypass capacitor is needed if the device is more than six inches from the main input filter capacitor, and the pin withstands reverse voltage (absolute maximum ±20V).
2 GND power_in Ground.
3 SHDN input Shutdown input that turns the output off when pulled low, can be driven by 5V logic or open-collector logic with a pull-up resistor, must be tied to VIN if unused and must not be left unconnected.
4 ADJ input Adjust pin and error amplifier input, referenced to 1.22V, internally clamped to ±7V with 30nA bias current, setting an output range of 1.22V to 20V through an external resistor divider.
5 OUT power_out Regulated output supplying the load, requiring a minimum output capacitor of 1μF to prevent oscillations.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package TSOT-23-5
Category Power Management ICs
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Minimum Input Voltage VIN(min) 1.8 2.3 V ILOAD = 100mA, over full temperature range 4
ADJ Pin Voltage VADJ 1.205 1.22 1.235 V VIN = 2V, ILOAD = 1mA 4
ADJ Pin Voltage VADJ 1.19 1.22 1.25 V 2.3V < VIN < 20V, 1mA < ILOAD < 50mA 4
ADJ Pin Voltage VADJ 1.17 1.22 1.26 V 2.3V < VIN < 20V, 1mA < ILOAD < 100mA 4
Line Regulation 1 10 mV ΔVIN = 2V to 20V, ILOAD = 1mA 4
Load Regulation 1 6 mV VIN = 2.3V, ΔILOAD = 1mA to 50mA 5
Load Regulation (full temp) 12 mV VIN = 2.3V, ΔILOAD = 1mA to 50mA, over full temperature range 5
Load Regulation 1 12 mV VIN = 2.3V, ΔILOAD = 1mA to 100mA 5
Load Regulation (full temp) 50 mV VIN = 2.3V, ΔILOAD = 1mA to 100mA, over full temperature range 5
Dropout Voltage 0.1 0.15 V ILOAD = 1mA 5
Dropout Voltage (full temp) 0.19 V ILOAD = 1mA, over full temperature range 5
Dropout Voltage 0.17 0.22 V ILOAD = 10mA 5
Dropout Voltage (full temp) 0.29 V ILOAD = 10mA, over full temperature range 5
Dropout Voltage 0.24 0.28 V ILOAD = 50mA 5
Dropout Voltage (full temp) 0.38 V ILOAD = 50mA, over full temperature range 5
Dropout Voltage 0.3 0.35 V ILOAD = 100mA 5
Dropout Voltage (full temp) 0.45 V ILOAD = 100mA, over full temperature range 5
GND Pin Current 20 45 μA ILOAD = 0mA 6
GND Pin Current 55 100 μA ILOAD = 1mA 6
GND Pin Current 230 400 μA ILOAD = 10mA 6
GND Pin Current 1 2 mA ILOAD = 50mA 6
GND Pin Current 2.2 4 mA ILOAD = 100mA 6
Output Voltage Noise 20 μVRMS COUT = 10μF, CBYP = 0.01μF, ILOAD = 100mA, BW = 10Hz to 100kHz 6
ADJ Pin Bias Current 30 100 nA 6
Shutdown Threshold (Off to On) 0.8 2 V VOUT = Off to On 6
Shutdown Threshold (On to Off) 0.25 0.65 V VOUT = On to Off 6
SHDN Pin Current 0 0.5 μA VSHDN = 0V 6
SHDN Pin Current 1 3 μA VSHDN = 20V 6
Quiescent Current in Shutdown 0.01 0.1 μA VIN = 6V, VSHDN = 0V 6
Ripple Rejection 55 65 dB VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 50mA 6
Current Limit 200 mA VIN = 7V, VOUT = 0V 6
Current Limit 110 mA VIN = VOUT(NOMINAL) + 1V or 2.3V (Note 12), ΔVOUT = -5% 6
Input Reverse Leakage Current 1 mA VIN = -20V, VOUT = 0V 6
Reverse Output Current 5 10 μA VOUT = 1.22V, VIN < 1.22V 6
IN Pin Voltage -20 20 V 2
OUT Pin Voltage -20 20 V 2
Input to Output Differential Voltage -20 20 V 2
ADJ Pin Voltage -7 7 V 2
SHDN Pin Voltage -20 20 V 2
Operating Junction Temperature Range (I Grade) TJ -40 125 °C I Grade 2
Storage Temperature Range TSTG -65 150 °C 2
Lead Temperature (Soldering, 10 sec) 300 °C 2
Maximum Junction Temperature TJMAX 150 °C S5 package pin configuration 2
Thermal Resistance Junction-to-Ambient θJA 250 °C/W S5 package, TJMAX = 150°C 2
Thermal Resistance Junction-to-Ambient θJA 125 °C/W 2500mm2 topside copper, 2500mm2 backside, 2500mm2 board area 17
Thermal Resistance Junction-to-Ambient θJA 150 °C/W 50mm2 topside copper, 2500mm2 backside, 2500mm2 board area 17

CAD (KiCad official)

  • Symbol: LT1761IS5-SD#TRMPBF
  • Footprint: Package_TO_SOT_SMD:TSOT-23-5
  • 3D model: TSOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lt1761is5-sd-trmpbf-etched.step / lt1761is5-sd-trmpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1761is5-sd-trmpbf.step / lt1761is5-sd-trmpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (22 pp, sha256 5e4fc36c022415d2, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF