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LT1761IS5-1.2#TRMPBF
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Analog Devices Linear Voltage Regulators (LDO), TSOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLT1761IS5-1.2#TRMPBF
Analog Devices · Linear Voltage Regulators (LDO) · TSOT-23-5
LT1761IS5-1.2#TRMPBF from Analog Devices, in a TSOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input pin that supplies power to the device; a bypass capacitor of 1μF to 10μF is sufficient, and the input is designed to withstand reverse voltage relative to ground and OUT. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | SHDN | input | Shutdown pin: pulling it low turns the output off, it may be driven by 5V logic or open-collector logic with a pull-up resistor, and if unused it must be connected to VIN. |
| 4 | BYP | passive | Reference bypass pin, internally clamped to ±0.6V from ground; a capacitor of up to 0.01μF from OUT to this pin lowers output noise to a typical 20μVRMS, and if not used it must be left unconnected. |
| 5 | OUT | power_out | Regulated output that supplies the load; a minimum output capacitor of 1μF is required to prevent oscillations. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | TSOT-23-5 |
| Category | Power Management ICs |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Regulated Output Voltage LT1761-1.2 | VOUT | 1.185 | 1.2 | 1.215 | V | VIN = 2V, ILOAD = 1mA | 4 |
| Regulated Output Voltage LT1761-1.2 | VOUT | 1.17 | 1.2 | 1.23 | V | 2.3V < VIN < 20V, 1mA < ILOAD < 50mA (l) | 4 |
| Regulated Output Voltage LT1761-1.2 | VOUT | 1.15 | 1.2 | 1.24 | V | 2.3V < VIN < 20V, 1mA < ILOAD < 100mA (l) | 4 |
| Minimum Input Voltage | VIN(MIN) | 1.8 | 2.3 | V | ILOAD = 100mA (l) | 4 | |
| Line Regulation LT1761-1.2 | 1 | 10 | mV | ΔVIN = 2V to 20V, ILOAD = 1mA | 4 | ||
| Dropout Voltage | VDROPOUT | 0.1 | 0.15 | V | VIN = VOUT(NOMINAL), ILOAD = 1mA | 5 | |
| Dropout Voltage | VDROPOUT | 0.19 | V | VIN = VOUT(NOMINAL), ILOAD = 1mA (l) | 5 | ||
| Dropout Voltage | VDROPOUT | 0.17 | 0.22 | V | VIN = VOUT(NOMINAL), ILOAD = 10mA | 5 | |
| Dropout Voltage | VDROPOUT | 0.29 | V | VIN = VOUT(NOMINAL), ILOAD = 10mA (l) | 5 | ||
| Dropout Voltage | VDROPOUT | 0.24 | 0.28 | V | VIN = VOUT(NOMINAL), ILOAD = 50mA | 5 | |
| Dropout Voltage | VDROPOUT | 0.38 | V | VIN = VOUT(NOMINAL), ILOAD = 50mA (l) | 5 | ||
| Dropout Voltage | VDROPOUT | 0.3 | 0.35 | V | VIN = VOUT(NOMINAL), ILOAD = 100mA | 5 | |
| Dropout Voltage | VDROPOUT | 0.45 | V | VIN = VOUT(NOMINAL), ILOAD = 100mA (l) | 5 | ||
| GND Pin Current | IGND | 20 | 45 | μA | VIN = VOUT(NOMINAL), ILOAD = 0mA (l) | 6 | |
| GND Pin Current | IGND | 55 | 100 | μA | VIN = VOUT(NOMINAL), ILOAD = 1mA (l) | 6 | |
| GND Pin Current | IGND | 230 | 400 | μA | VIN = VOUT(NOMINAL), ILOAD = 10mA (l) | 6 | |
| GND Pin Current | IGND | 1 | 2 | mA | VIN = VOUT(NOMINAL), ILOAD = 50mA (l) | 6 | |
| GND Pin Current | IGND | 2.2 | 4 | mA | VIN = VOUT(NOMINAL), ILOAD = 100mA (l) | 6 | |
| Ripple Rejection | 55 | 65 | dB | VIN, VOUT = 1.5V (Avg), VRIPPLE = 0.5VP-P, fRIPPLE = 120Hz, ILOAD = 50mA | 6 | ||
| Current Limit | ILIM | 110 | 200 | mA | VIN = VOUT(NOMINAL) + 1V or 2.3V, ΔVOUT = -5% (l) | 6 | |
| Input Reverse Leakage Current | 1 | mA | VIN = -20V, VOUT = 0V (l) | 6 | |||
| Reverse Output Current LT1761-1.2 | 10 | 20 | μA | VOUT = 1.2V, VIN < 1.2V | 6 | ||
| Output Voltage Noise | 20 | μVRMS | COUT = 10μF, CBYP = 0.01μF, ILOAD = 100mA, BW = 10Hz to 100kHz | 6 | |||
| Quiescent Current in Shutdown | 0.01 | 0.1 | μA | VIN = 6V, VSHDN = 0V | 6 | ||
| Operating Junction Temperature Range (E, I Grade) | TJ | -40 | 125 | °C | E, I grade (Note 2) | 2 | |
| IN Pin Voltage | VIN | -20 | 20 | V | 2 | ||
| OUT Pin Voltage | VOUT | -20 | 20 | V | 2 | ||
| Input to Output Differential Voltage | -20 | 20 | V | 2 | |||
| SHDN Pin Voltage | VSHDN | -20 | 20 | V | 2 | ||
| Maximum Junction Temperature | TJMAX | 150 | °C | 2 | |||
| Storage Temperature Range | TSTG | -65 | 150 | °C | 2 | ||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | Soldering, 10 sec | 2 | |||
| Thermal Resistance Junction-to-Ambient | θJA | 250 | °C/W | Per package header, S5 TSOT-23 package | 2 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 125 | °C/W | Board area 2500mm2, topside copper 2500mm2, backside copper 2500mm2 | 17 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 130 | °C/W | Board area 2500mm2, topside copper 225mm2, backside copper 2500mm2 | 17 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 135 | °C/W | Board area 2500mm2, topside copper 100mm2, backside copper 2500mm2 | 17 | ||
| Thermal Resistance Junction-to-Ambient | θJA | 150 | °C/W | Board area 2500mm2, topside copper 50mm2, backside copper 2500mm2 | 17 |
CAD (KiCad official)
- Symbol:
LT1761IS5-1.2#TRMPBF - Footprint:
Package_TO_SOT_SMD:TSOT-23-5 - 3D model: TSOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lt1761is5-1-2-trmpbf-etched.step/lt1761is5-1-2-trmpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt1761is5-1-2-trmpbf.step/lt1761is5-1-2-trmpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (22 pp, sha256
5e4fc36c022415d2, retrieved 2026-11-02, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).