component
LT1713IMS8#TRPBF
Public Made by Adomby adom
Analog Devices Comparators, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LT1713IMS8#TRPBF
Analog Devices · Comparators · MSOP-8
LT1713IMS8#TRPBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | V+ | power_in | Positive supply voltage, usually 5V; positive supply range is 2.4V to 7V. |
| 2 | +IN | input | Noninverting input; rail-to-rail common mode range extends 100mV beyond both supply rails. |
| 3 | -IN | input | Inverting input; rail-to-rail common mode range extends 100mV beyond both supply rails. |
| 4 | V- | power_in | Negative supply voltage, usually 0V or -5V; must not be greater than the ground pin voltage. |
| 5 | LATCH ENABLE | input | Latch enable input; with a logic high the output is latched (VIH min 2.4V, VIL max 0.8V, about 100mV hysteresis). |
| 6 | GND | power_in | Ground supply voltage, usually 0V. |
| 7 | Q | output | Noninverting rail-to-rail TTL/CMOS compatible output that can sink or source 10mA. |
| 8 | ~{Q} | output | Inverting rail-to-rail TTL/CMOS compatible complementary output that can sink or source 10mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage V+ to V- | V+ to V- | 12.6 | V | 2 | |||
| Supply voltage V+ to GND | V+ to GND | 12.6 | V | 2 | |||
| Supply voltage V- to GND | V- to GND | -10 | 0.3 | V | 2 | ||
| Differential input voltage | -12.6 | 12.6 | V | 2 | |||
| Latch pin voltage | 7 | V | 2 | ||||
| Input and latch current | -10 | 10 | mA | 2 | |||
| Output current (continuous) | -20 | 20 | mA | 2 | |||
| Operating temperature range | -40 | 85 | °C | 2 | |||
| Junction temperature | TJMAX | 150 | °C | 2 | |||
| Storage temperature range | -65 | 150 | °C | 2 | |||
| Lead temperature (soldering, 10 sec) | 300 | °C | 2 | ||||
| Thermal resistance junction to ambient, MS8 | θJA | 250 | °C/W | MS8 package | 2 | ||
| Positive supply voltage range | V+ | 2.4 | 7 | V | ● | 2 | |
| Input offset voltage | VOS | 0.5 | 4 | mV | RS = 50Ω, VCM = V+/2 | 2 | |
| Input offset voltage over temperature | VOS | 5 | mV | RS = 50Ω, VCM = V+/2 (Note 11) ● | 2 | ||
| Input offset voltage | VOS | 0.7 | mV | RS = 50Ω, VCM = 0V | 2 | ||
| Input offset voltage | VOS | 1 | mV | RS = 50Ω, VCM = V+ | 2 | ||
| Input offset voltage drift | ∆VOS/∆T | 5 | µV/°C | ● | 2 | ||
| Input offset current | IOS | 0.1 | 1 | µA | 2 | ||
| Input offset current over temperature | IOS | 2 | µA | ● | 2 | ||
| Input bias current | IB | -7 | -1.5 | 2 | µA | Note 5 | 2 |
| Input bias current over temperature | IB | -15 | 5 | µA | Note 5 ● | 2 | |
| Common mode rejection ratio | CMRR | 60 | 70 | dB | V+ = 5V, 0V ≤ VCM ≤ 5V | 2 | |
| Common mode rejection ratio over temperature | CMRR | 58 | dB | V+ = 5V, 0V ≤ VCM ≤ 5V ● | 2 | ||
| Common mode rejection ratio | CMRR | 57 | 70 | dB | V+ = 2.7V, 0V ≤ VCM ≤ 2.7V | 2 | |
| Common mode rejection ratio over temperature | CMRR | 55 | dB | V+ = 2.7V, 0V ≤ VCM ≤ 2.7V ● | 2 | ||
| Positive power supply rejection ratio | PSRR+ | 65 | 80 | dB | 2.4V ≤ V+ ≤ 7V, VCM = 0V | 3 | |
| Positive power supply rejection ratio over temperature | PSRR+ | 60 | dB | ● | 3 | ||
| Negative power supply rejection ratio | PSRR- | 65 | 80 | dB | -7V ≤ V- ≤ 0V, V+ = 5V, VCM = 5V | 3 | |
| Negative power supply rejection ratio over temperature | PSRR- | 60 | dB | ● | 3 | ||
| Small-signal voltage gain | AV | 1.5 | 3 | V/mV | Note 10 | 3 | |
| Output voltage swing LOW | VOL | 0.2 | 0.4 | V | IOUT = -1mA, VOVERDRIVE = 50mV ● | 3 | |
| Output voltage swing LOW | VOL | 0.35 | 0.5 | V | IOUT = -10mA, VOVERDRIVE = 50mV ● | 3 | |
| Positive supply current (per comparator) | I+ | 5 | 6.5 | mA | V+ = 5V, VOVERDRIVE = 1V | 3 | |
| Positive supply current (per comparator) over temperature | I+ | 8 | mA | V+ = 5V, VOVERDRIVE = 1V ● | 3 | ||
| Negative supply current (per comparator) | I- | 3 | 4 | mA | V+ = 5V, VOVERDRIVE = 1V | 3 | |
| Negative supply current (per comparator) over temperature | I- | 4.5 | mA | V+ = 5V, VOVERDRIVE = 1V ● | 3 | ||
| Latch pin high input voltage | VIH | 2.4 | V | ● | 3 | ||
| Latch pin low input voltage | VIL | 0.8 | V | ● | 3 | ||
| Latch pin current | IIL | 10 | µA | VLATCH = V+ ● | 3 | ||
| Propagation delay | tPD | 8 | 11 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 3 | |
| Propagation delay over temperature | tPD | 12.5 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV ● | 3 | ||
| Propagation delay | tPD | 9 | ns | ∆VIN = 100mV, VOVERDRIVE = 5mV | 3 | ||
| Differential propagation delay | ∆tPD | 0.5 | 3 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 3 | |
| Negative supply voltage range | V- | -7 | 0 | V | Note 3 ●; V+ = 5V, V- = -5V | 3 | |
| Input offset voltage (±5V) | VOS | 0.5 | 3 | mV | RS = 50Ω, VCM = 0V; V+ = 5V, V- = -5V | 3 | |
| Input offset voltage over temperature (±5V) | VOS | 4 | mV | RS = 50Ω, VCM = 0V ●; V+ = 5V, V- = -5V | 3 | ||
| Input voltage range (±5V) | VCM | -5.1 | 5.1 | V | ● ; V+ = 5V, V- = -5V | 4 | |
| Common mode rejection ratio (±5V) | CMRR | 62 | 70 | dB | -5V ≤ VCM ≤ 5V | 4 | |
| Positive power supply rejection ratio (±5V) | PSRR+ | 68 | 80 | dB | 2.4V ≤ V+ ≤ 7V, VCM = -5V | 4 | |
| Negative power supply rejection ratio (±5V) | PSRR- | 65 | 80 | dB | -7V ≤ V- ≤ 0V, VCM = 5V | 4 | |
| Small-signal voltage gain (±5V) | AV | 1.5 | 3 | V/mV | 1V ≤ VOUT ≤ 4V, RL = ∞ | 4 | |
| Output voltage swing HIGH (±5V) | VOH | 4.5 | 4.8 | V | IOUT = 1mA, VOVERDRIVE = 50mV (Note 8) ● | 4 | |
| Output voltage swing HIGH (±5V) | VOH | 4.3 | 4.6 | V | IOUT = 10mA, VOVERDRIVE = 50mV (Note 8) ● | 4 | |
| Output voltage swing LOW (±5V) | VOL | 0.35 | 0.5 | V | IOUT = -10mA, VOVERDRIVE = 50mV (Note 8) ● | 4 | |
| Positive supply current per comparator (±5V) | I+ | 5.5 | 7.5 | mA | VOVERDRIVE = 1V | 4 | |
| Positive supply current per comparator over temperature (±5V) | I+ | 9 | mA | VOVERDRIVE = 1V ● | 4 | ||
| Negative supply current per comparator (±5V) | I- | 3.5 | 4.5 | mA | VOVERDRIVE = 1V | 4 | |
| Propagation delay (±5V) | tPD | 7 | 10 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 4 | |
| Propagation delay over temperature (±5V) | tPD | 12 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV ● | 4 |
CAD (KiCad official)
- Symbol:
LT1713IMS8#TRPBF - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
lt1713ims8-trpbf-etched.step/lt1713ims8-trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt1713ims8-trpbf.step/lt1713ims8-trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (16 pp, sha256
42a2c946cec9f1e7, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LT1713IMS8#TRPBF
**Analog Devices** · Comparators · MSOP-8
LT1713IMS8#TRPBF from Analog Devices, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | V+ | power_in | Positive supply voltage, usually 5V; positive supply range is 2.4V to 7V. |
| 2 | +IN | input | Noninverting input; rail-to-rail common mode range extends 100mV beyond both supply rails. |
| 3 | -IN | input | Inverting input; rail-to-rail common mode range extends 100mV beyond both supply rails. |
| 4 | V- | power_in | Negative supply voltage, usually 0V or -5V; must not be greater than the ground pin voltage. |
| 5 | LATCH ENABLE | input | Latch enable input; with a logic high the output is latched (VIH min 2.4V, VIL max 0.8V, about 100mV hysteresis). |
| 6 | GND | power_in | Ground supply voltage, usually 0V. |
| 7 | Q | output | Noninverting rail-to-rail TTL/CMOS compatible output that can sink or source 10mA. |
| 8 | ~{Q} | output | Inverting rail-to-rail TTL/CMOS compatible complementary output that can sink or source 10mA. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | MSOP-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage V+ to V- | V+ to V- | | | 12.6 | V | | 2 |
| Supply voltage V+ to GND | V+ to GND | | | 12.6 | V | | 2 |
| Supply voltage V- to GND | V- to GND | -10 | | 0.3 | V | | 2 |
| Differential input voltage | | -12.6 | | 12.6 | V | | 2 |
| Latch pin voltage | | | | 7 | V | | 2 |
| Input and latch current | | -10 | | 10 | mA | | 2 |
| Output current (continuous) | | -20 | | 20 | mA | | 2 |
| Operating temperature range | | -40 | | 85 | °C | | 2 |
| Junction temperature | TJMAX | | | 150 | °C | | 2 |
| Storage temperature range | | -65 | | 150 | °C | | 2 |
| Lead temperature (soldering, 10 sec) | | | | 300 | °C | | 2 |
| Thermal resistance junction to ambient, MS8 | θJA | | 250 | | °C/W | MS8 package | 2 |
| Positive supply voltage range | V+ | 2.4 | | 7 | V | ● | 2 |
| Input offset voltage | VOS | | 0.5 | 4 | mV | RS = 50Ω, VCM = V+/2 | 2 |
| Input offset voltage over temperature | VOS | | | 5 | mV | RS = 50Ω, VCM = V+/2 (Note 11) ● | 2 |
| Input offset voltage | VOS | | 0.7 | | mV | RS = 50Ω, VCM = 0V | 2 |
| Input offset voltage | VOS | | 1 | | mV | RS = 50Ω, VCM = V+ | 2 |
| Input offset voltage drift | ∆VOS/∆T | | 5 | | µV/°C | ● | 2 |
| Input offset current | IOS | | 0.1 | 1 | µA | | 2 |
| Input offset current over temperature | IOS | | | 2 | µA | ● | 2 |
| Input bias current | IB | -7 | -1.5 | 2 | µA | Note 5 | 2 |
| Input bias current over temperature | IB | -15 | | 5 | µA | Note 5 ● | 2 |
| Common mode rejection ratio | CMRR | 60 | 70 | | dB | V+ = 5V, 0V ≤ VCM ≤ 5V | 2 |
| Common mode rejection ratio over temperature | CMRR | 58 | | | dB | V+ = 5V, 0V ≤ VCM ≤ 5V ● | 2 |
| Common mode rejection ratio | CMRR | 57 | 70 | | dB | V+ = 2.7V, 0V ≤ VCM ≤ 2.7V | 2 |
| Common mode rejection ratio over temperature | CMRR | 55 | | | dB | V+ = 2.7V, 0V ≤ VCM ≤ 2.7V ● | 2 |
| Positive power supply rejection ratio | PSRR+ | 65 | 80 | | dB | 2.4V ≤ V+ ≤ 7V, VCM = 0V | 3 |
| Positive power supply rejection ratio over temperature | PSRR+ | 60 | | | dB | ● | 3 |
| Negative power supply rejection ratio | PSRR- | 65 | 80 | | dB | -7V ≤ V- ≤ 0V, V+ = 5V, VCM = 5V | 3 |
| Negative power supply rejection ratio over temperature | PSRR- | 60 | | | dB | ● | 3 |
| Small-signal voltage gain | AV | 1.5 | 3 | | V/mV | Note 10 | 3 |
| Output voltage swing LOW | VOL | | 0.2 | 0.4 | V | IOUT = -1mA, VOVERDRIVE = 50mV ● | 3 |
| Output voltage swing LOW | VOL | | 0.35 | 0.5 | V | IOUT = -10mA, VOVERDRIVE = 50mV ● | 3 |
| Positive supply current (per comparator) | I+ | | 5 | 6.5 | mA | V+ = 5V, VOVERDRIVE = 1V | 3 |
| Positive supply current (per comparator) over temperature | I+ | | | 8 | mA | V+ = 5V, VOVERDRIVE = 1V ● | 3 |
| Negative supply current (per comparator) | I- | | 3 | 4 | mA | V+ = 5V, VOVERDRIVE = 1V | 3 |
| Negative supply current (per comparator) over temperature | I- | | | 4.5 | mA | V+ = 5V, VOVERDRIVE = 1V ● | 3 |
| Latch pin high input voltage | VIH | 2.4 | | | V | ● | 3 |
| Latch pin low input voltage | VIL | | | 0.8 | V | ● | 3 |
| Latch pin current | IIL | | | 10 | µA | VLATCH = V+ ● | 3 |
| Propagation delay | tPD | | 8 | 11 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 3 |
| Propagation delay over temperature | tPD | | | 12.5 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV ● | 3 |
| Propagation delay | tPD | | 9 | | ns | ∆VIN = 100mV, VOVERDRIVE = 5mV | 3 |
| Differential propagation delay | ∆tPD | | 0.5 | 3 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 3 |
| Negative supply voltage range | V- | -7 | | 0 | V | Note 3 ●; V+ = 5V, V- = -5V | 3 |
| Input offset voltage (±5V) | VOS | | 0.5 | 3 | mV | RS = 50Ω, VCM = 0V; V+ = 5V, V- = -5V | 3 |
| Input offset voltage over temperature (±5V) | VOS | | | 4 | mV | RS = 50Ω, VCM = 0V ●; V+ = 5V, V- = -5V | 3 |
| Input voltage range (±5V) | VCM | -5.1 | | 5.1 | V | ● ; V+ = 5V, V- = -5V | 4 |
| Common mode rejection ratio (±5V) | CMRR | 62 | 70 | | dB | -5V ≤ VCM ≤ 5V | 4 |
| Positive power supply rejection ratio (±5V) | PSRR+ | 68 | 80 | | dB | 2.4V ≤ V+ ≤ 7V, VCM = -5V | 4 |
| Negative power supply rejection ratio (±5V) | PSRR- | 65 | 80 | | dB | -7V ≤ V- ≤ 0V, VCM = 5V | 4 |
| Small-signal voltage gain (±5V) | AV | 1.5 | 3 | | V/mV | 1V ≤ VOUT ≤ 4V, RL = ∞ | 4 |
| Output voltage swing HIGH (±5V) | VOH | 4.5 | 4.8 | | V | IOUT = 1mA, VOVERDRIVE = 50mV (Note 8) ● | 4 |
| Output voltage swing HIGH (±5V) | VOH | 4.3 | 4.6 | | V | IOUT = 10mA, VOVERDRIVE = 50mV (Note 8) ● | 4 |
| Output voltage swing LOW (±5V) | VOL | | 0.35 | 0.5 | V | IOUT = -10mA, VOVERDRIVE = 50mV (Note 8) ● | 4 |
| Positive supply current per comparator (±5V) | I+ | | 5.5 | 7.5 | mA | VOVERDRIVE = 1V | 4 |
| Positive supply current per comparator over temperature (±5V) | I+ | | | 9 | mA | VOVERDRIVE = 1V ● | 4 |
| Negative supply current per comparator (±5V) | I- | | 3.5 | 4.5 | mA | VOVERDRIVE = 1V | 4 |
| Propagation delay (±5V) | tPD | | 7 | 10 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV | 4 |
| Propagation delay over temperature (±5V) | tPD | | | 12 | ns | ∆VIN = 100mV, VOVERDRIVE = 20mV ● | 4 |
## CAD (KiCad official)
- Symbol: `LT1713IMS8#TRPBF`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `lt1713ims8-trpbf-etched.step` / `lt1713ims8-trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lt1713ims8-trpbf.step` / `lt1713ims8-trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/171314f.pdf) (16 pp, sha256 `42a2c946cec9f1e7`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lt1713ims8-trpbf-datasheet.pdf)