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LT1671IS8#PBF
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Analog Devices Comparators, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
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Datasheet
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README
markdownLT1671IS8#PBF
Analog Devices · Comparators · SOIC-8
LT1671IS8#PBF from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | V+ | power_in | Positive supply voltage, normally 5V; the datasheet's absolute maximum positive supply voltage is 7V. |
| 2 | +IN | input | Noninverting comparator input whose common-mode range extends to the negative supply and 1.5V below the positive supply. |
| 3 | -IN | input | Inverting comparator input with the same common-mode range as +IN, and differential input voltage limited to ±12V absolute maximum. |
| 4 | V- | power_in | Negative supply voltage, normally either 0V or -5V; the absolute maximum negative supply voltage is -7V. |
| 5 | LATCH ENABLE | input | Latch control: when high, the outputs stay latched independent of the inputs, and the pin is TTL/CMOS compatible with VIH of 2V minimum and VIL of 0.8V maximum. |
| 6 | GND | power_in | Ground pin. |
| 7 | Q OUT | output | Noninverting logic output that is high when +IN is above -IN and LATCH ENABLE is low, with continuous output current limited to ±20mA absolute maximum. |
| 8 | Q OUT | output | Inverting logic output that is low when +IN is above -IN and LATCH ENABLE is low, with continuous output current limited to ±20mA absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SOIC-8 |
| Category | Operational Amplifier/Comparator |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | 0.8 | 2.5 | mV | RS ≤ 100Ω (Note 4) | 2 | |
| Input Offset Voltage | VOS | 4 | mV | ● full operating temperature range | 2 | ||
| Input Offset Current | IOS | 10 | 100 | nA | 2 | ||
| Input Offset Current | IOS | 150 | nA | ● full operating temperature range | 2 | ||
| Input Bias Current | IB | 120 | 280 | nA | 2 | ||
| Input Bias Current | IB | 350 | nA | ● full operating temperature range | 2 | ||
| Input Voltage Range (±5V supplies) | VCMR | -5 | 3.5 | V | ● full operating temperature range | 2 | |
| Input Voltage Range (single 5V supply) | VCMR | 0 | 3.5 | V | Single 5V Supply; ● full operating temperature range | 2 | |
| Common Mode Rejection Ratio | CMRR | 55 | 100 | dB | -5V ≤ VCM ≤ 3.5V, TA > 0°C | 2 | |
| Common Mode Rejection Ratio | CMRR | 55 | dB | -5V ≤ VCM ≤ 3.3V, TA ≤ 0°C | 2 | ||
| Common Mode Rejection Ratio (single 5V supply) | CMRR | 55 | 100 | dB | Single 5V Supply; 0V ≤ VCM ≤ 3.5V, TA > 0°C | 2 | |
| Common Mode Rejection Ratio (single 5V supply) | CMRR | 55 | dB | Single 5V Supply; 0V ≤ VCM ≤ 3.3V, TA ≤ 0°C | 2 | ||
| Power Supply Rejection Ratio | PSRR | 50 | 85 | dB | 4.6V ≤ V+ ≤ 5.4V; ● full operating temperature range | 2 | |
| Power Supply Rejection Ratio | PSRR | 60 | 90 | dB | -7V ≤ V- ≤ -2V; ● full operating temperature range | 2 | |
| Small Signal Voltage Gain | AV | 2500 | 5000 | V/V | 1V ≤ VOUT ≤ 2V | 2 | |
| Output Voltage Swing High | VOH | 2.7 | 3.1 | V | V+ ≥ 4.6V, IOUT = 400µA; ● full operating temperature range | 3 | |
| Output Voltage Swing High | VOH | 2.4 | 3 | V | V+ ≥ 4.6V, IOUT = 4mA; ● full operating temperature range | 3 | |
| Output Voltage Swing Low | VOL | 0.3 | 0.5 | V | IOUT = -400µA; ● full operating temperature range | 3 | |
| Output Voltage Swing Low | VOL | 0.4 | V | IOUT = -4mA | 3 | ||
| Positive Supply Current | I+ | 450 | 800 | µA | 3 | ||
| Positive Supply Current | I+ | 1000 | µA | ● full operating temperature range | 3 | ||
| Negative Supply Current | I- | 75 | 200 | µA | 3 | ||
| Negative Supply Current | I- | 250 | µA | ● full operating temperature range | 3 | ||
| LATCH Pin High Input Voltage | VIH | 2 | V | ● full operating temperature range | 3 | ||
| LATCH Pin Low Input Voltage | VIL | 0.8 | V | ● full operating temperature range | 3 | ||
| LATCH Pin Current | IIL | -1000 | -250 | nA | VLATCH = 0V; ● full operating temperature range | 3 | |
| Propagation Delay | tPD1 | 60 | 80 | ns | ∆VIN = 100mV, VOD = 20mV | 3 | |
| Propagation Delay | tPD1 | 110 | ns | ∆VIN = 100mV, VOD = 20mV; ● full operating temperature range | 3 | ||
| Propagation Delay (Note 7) | tPD2 | 85 | 100 | ns | ∆VIN = 100mV, VOD = 5mV | 3 | |
| Propagation Delay (Note 7) | tPD2 | 130 | ns | ∆VIN = 100mV, VOD = 5mV; ● full operating temperature range | 3 | ||
| Differential Propagation Delay (Note 7) | ∆tPD | 15 | 30 | ns | ∆VIN = 100mV, VOD = 5mV | 3 | |
| Minimum Disable Pulse Width | tPW(D) | 30 | ns | 3 | |||
| Latch Propagation Delay (Note 8) | tLPD | 60 | ns | 3 | |||
| Latch Setup Time (Note 8) | tSU | -15 | ns | 3 | |||
| Latch Hold Time (Note 8) | tH | 35 | ns | 3 | |||
| Total Supply Voltage (V+ to V-) | V+ − V- | 12 | V | 2 | |||
| Positive Supply Voltage | V+ | 7 | V | 2 | |||
| Negative Supply Voltage | V- | -7 | V | 2 | |||
| Differential Input Voltage | -12 | 12 | V | 2 | |||
| Input and Latch Current | -10 | 10 | mA | Note 2 | 2 | ||
| Output Current (Continuous) | -20 | 20 | mA | Note 2 | 2 | ||
| Operating Temperature Range | -40 | 85 | °C | 2 | |||
| Specified Temperature Range | -40 | 85 | °C | Note 3 | 2 | ||
| Junction Temperature | TJMAX | 150 | °C | 2 | |||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature | 300 | °C | Soldering, 10 sec. | 2 | |||
| Thermal Resistance, Junction to Ambient (S8 package) | θJA | 190 | °C/W | S8 package (8-lead plastic SO) | 2 |
CAD (KiCad official)
- Symbol:
LT1671IS8#PBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
lt1671is8-pbf-etched.step/lt1671is8-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt1671is8-pbf.step/lt1671is8-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
4e3bb61bd867e99c, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).