LT1636IS8#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NULL	passive	Offset null terminal; a 10k potentiometer between pins 1 and 8 with its wiper to V- nulls the input offset voltage over a range of at least ±1mV.
2	-IN	input	Inverting input; the inputs take 44V differential and common mode and are protected to 22V below V- by internal 1k resistors.
3	+IN	input	Non-inverting input; the LT1636 operates with this input up to 44V above V- regardless of V+, with no output phase reversal for inputs 5V below V-.
4	V-	power_in	Negative supply pin; the LT1636 operates on single or split supplies with a total voltage of 2.7V to 44V and reverse battery protection to 27V.
5	SHDN	input	Shutdown pin; it can be taken up to 32V above V- and driving it 1.2V above V- reduces supply current to about 4µA with output leakage below 1µA.
6	OUT	output	Output swings to both supplies and drives 18mA, and the LT1636 is unity-gain stable into capacitive loads up to 10,000pF with a 0.22µF and 150Ω compensation network.
7	V+	power_in	Positive supply pin; it should be bypassed with about 0.01µF within an inch of the pin, and the output can be pulled up to 27V beyond V+ with V+ below 0.5V.
8	NULL	passive	Offset null terminal; connects to the offset nulling potentiometer with its wiper tied to V- as described for pin 1.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SO-8
Category	Amplifiers
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Total Supply Voltage (V+ to V-)				44	V		2
Input Differential Voltage				44	V		2
Input Current		-25		25	mA		2
Shutdown Pin Voltage Above V-				32	V		2
Shutdown Pin Current		-10		10	mA		2
Operating Temperature Range		-40		85	°C	LT1636C/LT1636I	2
Specified Temperature Range		-40		85	°C	LT1636C/LT1636I	2
Junction Temperature				150	°C		2
Storage Temperature Range		-65		150	°C		2
Lead Temperature				300	°C	Soldering, 10 sec	2
Thermal Resistance Junction-to-Ambient	θJA		190		°C/W	S8 package	2
Input Offset Voltage	VOS		50	225	µV	S8 Package, VS = 3V, 0V; VS = 5V, 0V; VCM = VOUT = half supply	2
Input Offset Voltage	VOS			600	µV	S8 Package, 0°C ≤ TA ≤ 70°C	2
Input Offset Voltage	VOS			750	µV	S8 Package, -40°C ≤ TA ≤ 85°C	2
Input Offset Voltage	VOS		100	450	µV	S8 Package, VS = ±15V, VCM = 0V, VOUT = 0V	4
Input Offset Voltage	VOS			750	µV	S8 Package, 0°C ≤ TA ≤ 70°C, VS = ±15V	4
Input Offset Voltage	VOS			900	µV	S8 Package, -40°C ≤ TA ≤ 85°C, VS = ±15V	4
Input Offset Current	IOS		0.1	0.8	nA	-40°C ≤ TA ≤ 85°C, 3V/5V	3
Input Bias Current	IB		5	8	nA	-40°C ≤ TA ≤ 85°C, 3V/5V	3
Input Voltage Range		0		44	V	-40°C ≤ TA ≤ 85°C, VS = 3V, 0V; VS = 5V, 0V	3
Supply Current	IS		42	55	µA	VS = 3V, 0V; VS = 5V, 0V	3
Supply Current	IS			60	µA	-40°C ≤ TA ≤ 85°C, VS = 3V, 0V; VS = 5V, 0V	3
Gain Bandwidth Product	GBW		110	200	kHz	f = 1kHz, VS = 3V, 0V; VS = 5V, 0V	4
Gain Bandwidth Product	GBW	90			kHz	-40°C ≤ TA ≤ 85°C, f = 1kHz	4
Slew Rate	SR		0.035	0.07	V/µs	AV = -1, RL = ∞, VS = 3V, 0V; VS = 5V, 0V	4
Slew Rate	SR	0.03			V/µs	-40°C ≤ TA ≤ 85°C, AV = -1, RL = ∞	4
Supply Current	IS		50	70	µA	VS = ±15V, VCM = 0V, VOUT = 0V, VSHDN = V-	5
Supply Current	IS			85	µA	-40°C ≤ TA ≤ 85°C, VS = ±15V	5
Gain Bandwidth Product	GBW		125	220	kHz	f = 1kHz, VS = ±15V	5
Slew Rate	SR		0.0375	0.075	V/µs	AV = -1, RL = ∞, VO = ±10V, measured at ±5V, VS = ±15V	5
Large-Signal Voltage Gain	AVOL	133			V/mV	VS = 3V, 0°C ≤ TA ≤ 70°C	3
Large-Signal Voltage Gain	AVOL	100			V/mV	VS = 3V, -40°C ≤ TA ≤ 85°C	3
Large-Signal Voltage Gain	AVOL	250			V/mV	VS = 5V, 0°C ≤ TA ≤ 70°C	3
Large-Signal Voltage Gain	AVOL	200			V/mV	VS = 5V, -40°C ≤ TA ≤ 85°C	3

CAD (KiCad official)

Symbol: LT1636IS8#TRPBF
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: lt1636is8-trpbf-etched.step / lt1636is8-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1636is8-trpbf.step / lt1636is8-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (16 pp, sha256 c1cff2013cd2e27e, retrieved 2026-11-02, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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