component
LT1363CS8#PBF
Public Made by Adomby adom
Analog Devices Pre-ordered Chips, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LT1363CS8#PBF
Analog Devices · Pre-ordered Chips · SO-8
LT1363CS8#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NULL | passive | Offset null terminal; the suggested nulling circuit connects a 10k potentiometer between pins 1 and 8 with its wiper to V+. |
| 2 | -IN | input | Inverting input; differential input voltage up to ±10V is allowed for transient operation only, and input voltage must not exceed ±VS. |
| 3 | +IN | input | Noninverting input; differential input voltage up to ±10V is allowed for transient operation only, and input voltage must not exceed ±VS. |
| 4 | V- | power_in | Negative supply; total supply voltage V+ to V- is limited to 36V maximum. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | output | Amplifier output; drives 150Ω to ±7.5V on ±15V supplies with 50mA minimum output current, short-circuit duration indefinite, and is stable with any capacitive load. |
| 7 | V+ | power_in | Positive supply; total supply voltage V+ to V- is limited to 36V maximum, with 7.5mA maximum supply current at ±15V. |
| 8 | NULL | passive | Offset null terminal; the suggested nulling circuit connects a 10k potentiometer between pins 1 and 8 with its wiper to V+. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SO-8 |
| Category | Interface ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | 0.5 | 1.5 | mV | VSUPPLY ±15V | 2 | |
| Input Offset Voltage | VOS | 0.7 | 1.8 | mV | VSUPPLY ±2.5V | 2 | |
| Input Offset Current | IOS | 120 | 350 | nA | ±2.5V to ±15V | 2 | |
| Input Bias Current | IB | 0.6 | 2 | µA | ±2.5V to ±15V | 2 | |
| Input Voltage Range+ | 12 | 13.4 | V | VSUPPLY ±15V | 2 | ||
| Input Voltage Range+ | 2.5 | 3.4 | V | VSUPPLY ±5V | 2 | ||
| Input Voltage Range+ | 0.5 | 1.1 | V | VSUPPLY ±2.5V | 2 | ||
| Input Voltage Range- | -13.2 | -12 | V | VSUPPLY ±15V | 2 | ||
| Input Voltage Range- | -3.2 | -2.5 | V | VSUPPLY ±5V | 2 | ||
| Input Voltage Range- | -0.9 | -0.5 | V | VSUPPLY ±2.5V | 2 | ||
| Common Mode Rejection Ratio | CMRR | 84 | 90 | dB | VCM = ±12V, VSUPPLY ±15V | 2 | |
| Common Mode Rejection Ratio | CMRR | 76 | 81 | dB | VCM = ±2.5V, VSUPPLY ±5V | 2 | |
| Common Mode Rejection Ratio | CMRR | 66 | 71 | dB | VCM = ±0.5V, VSUPPLY ±2.5V | 2 | |
| Power Supply Rejection Ratio | PSRR | 90 | 100 | dB | VS = ±2.5V to ±15V | 2 | |
| Large-Signal Voltage Gain | AVOL | 4.5 | 9 | V/mV | VOUT = ±12V, RL = 1k, VSUPPLY ±15V | 2 | |
| Large-Signal Voltage Gain | AVOL | 3 | 6.5 | V/mV | VOUT = ±10V, RL = 500Ω, VSUPPLY ±15V | 2 | |
| Large-Signal Voltage Gain | AVOL | 2 | 3.8 | V/mV | VOUT = ±7.5V, RL = 150Ω, VSUPPLY ±15V | 2 | |
| Large-Signal Voltage Gain | AVOL | 3 | 6.4 | V/mV | VOUT = ±2.5V, RL = 500Ω, VSUPPLY ±5V | 2 | |
| Large-Signal Voltage Gain | AVOL | 2 | 5.6 | V/mV | VOUT = ±2.5V, RL = 150Ω, VSUPPLY ±5V | 2 | |
| Large-Signal Voltage Gain | AVOL | 2.5 | 5.2 | V/mV | VOUT = ±1V, RL = 500Ω, VSUPPLY ±2.5V | 2 | |
| Output Swing | VOUT | 13.5 | 14 | ±V | RL = 1k, VIN = ±40mV, VSUPPLY ±15V | 3 | |
| Output Swing | VOUT | 13 | 13.7 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±15V | 3 | |
| Output Swing | VOUT | 3.5 | 4.1 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±5V | 3 | |
| Output Swing | VOUT | 3.4 | 3.8 | ±V | RL = 150Ω, VIN = ±40mV, VSUPPLY ±5V | 3 | |
| Output Swing | VOUT | 1.3 | 1.7 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±2.5V | 3 | |
| Output Current | IOUT | 50 | 60 | mA | VOUT = ±7.5V, VSUPPLY ±15V | 3 | |
| Output Current | IOUT | 23 | 29 | mA | VOUT = ±3.4V, VSUPPLY ±5V | 3 | |
| Short-Circuit Current | ISC | 70 | 105 | mA | VOUT = 0V, VIN = ±3V, VSUPPLY ±15V | 3 | |
| Slew Rate | SR | 750 | 1000 | V/µs | AV = -2, VSUPPLY ±15V | 3 | |
| Slew Rate | SR | 300 | 450 | V/µs | AV = -2, VSUPPLY ±5V | 3 | |
| Gain Bandwidth | GBW | 70 | MHz | f = 1MHz, VSUPPLY ±15V | 3 | ||
| Gain Bandwidth | GBW | 50 | MHz | f = 1MHz, VSUPPLY ±5V | 3 | ||
| Gain Bandwidth | GBW | 40 | MHz | f = 1MHz, VSUPPLY ±2.5V | 3 | ||
| Rise Time | tr | 2.6 | ns | AV = 1, 10%-90%, 0.1V, VSUPPLY ±15V | 3 | ||
| Rise Time | tr | 3.6 | ns | AV = 1, 10%-90%, 0.1V, VSUPPLY ±5V | 3 | ||
| Settling Time | ts | 50 | ns | 10V Step, 0.1%, AV = -1, VSUPPLY ±15V | 3 | ||
| Settling Time | ts | 80 | ns | 10V Step, 0.01%, AV = -1, VSUPPLY ±15V | 3 | ||
| Settling Time | ts | 55 | ns | 5V Step, 0.1%, AV = -1, VSUPPLY ±5V | 3 | ||
| Supply Current | IS | 6.3 | 7.5 | mA | VSUPPLY ±15V | 3 | |
| Supply Current | IS | 6 | 7.2 | mA | VSUPPLY ±5V | 3 | |
| Output Resistance | RO | 0.7 | Ω | AV = 1, f = 1MHz, VSUPPLY ±15V | 3 | ||
| Input Offset Voltage (0 to 70 C) | VOS | 2 | mV | 0°C ≤ TA ≤ 70°C, VSUPPLY ±15V | 3 | ||
| Input Offset Voltage (0 to 70 C) | VOS | 2.2 | mV | 0°C ≤ TA ≤ 70°C, VSUPPLY ±2.5V | 3 | ||
| Input VOS Drift | 10 | 13 | µV/°C | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 | ||
| Input Offset Current (0 to 70 C) | IOS | 500 | nA | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 | ||
| Input Bias Current (0 to 70 C) | IB | 3 | µA | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 | ||
| Supply Current (0 to 70 C) | IS | 8.7 | mA | VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C | 4 | ||
| Supply Current (0 to 70 C) | IS | 8.4 | mA | VSUPPLY ±5V, 0°C ≤ TA ≤ 70°C | 4 | ||
| Total Supply Voltage (V+ to V-) | 36 | V | 2 | ||||
| Differential Input Voltage (Transient Only) | -10 | 10 | V | Note 2, transient operation only | 2 | ||
| Operating Temperature Range | TA | -40 | 85 | °C | Note 8 | 2 | |
| Specified Temperature Range | -40 | 85 | °C | Note 9 | 2 | ||
| Maximum Junction Temperature (Plastic Package) | TJMAX | 150 | °C | Plastic package | 2 | ||
| Storage Temperature Range | -65 | 150 | °C | 2 | |||
| Lead Temperature (Soldering, 10 sec) | 300 | °C | Soldering, 10 sec | 2 | |||
| Thermal Resistance, Junction to Ambient | θJA | 190 | °C/W | S8 package (8-lead plastic SO) | 2 |
CAD (KiCad official)
- Symbol:
LT1363CS8#PBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
lt1363cs8-pbf-etched.step/lt1363cs8-pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lt1363cs8-pbf.step/lt1363cs8-pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Analog Devices datasheet (12 pp, sha256
78ad3691b101ab45, retrieved 2026-10-28, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LT1363CS8#PBF
**Analog Devices** · Pre-ordered Chips · SO-8
LT1363CS8#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NULL | passive | Offset null terminal; the suggested nulling circuit connects a 10k potentiometer between pins 1 and 8 with its wiper to V+. |
| 2 | -IN | input | Inverting input; differential input voltage up to ±10V is allowed for transient operation only, and input voltage must not exceed ±VS. |
| 3 | +IN | input | Noninverting input; differential input voltage up to ±10V is allowed for transient operation only, and input voltage must not exceed ±VS. |
| 4 | V- | power_in | Negative supply; total supply voltage V+ to V- is limited to 36V maximum. |
| 5 | NC | unconnected | No internal connection. |
| 6 | VOUT | output | Amplifier output; drives 150Ω to ±7.5V on ±15V supplies with 50mA minimum output current, short-circuit duration indefinite, and is stable with any capacitive load. |
| 7 | V+ | power_in | Positive supply; total supply voltage V+ to V- is limited to 36V maximum, with 7.5mA maximum supply current at ±15V. |
| 8 | NULL | passive | Offset null terminal; the suggested nulling circuit connects a 10k potentiometer between pins 1 and 8 with its wiper to V+. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Analog Devices |
| Package | SO-8 |
| Category | Interface ICs |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Offset Voltage | VOS | | 0.5 | 1.5 | mV | VSUPPLY ±15V | 2 |
| Input Offset Voltage | VOS | | 0.7 | 1.8 | mV | VSUPPLY ±2.5V | 2 |
| Input Offset Current | IOS | | 120 | 350 | nA | ±2.5V to ±15V | 2 |
| Input Bias Current | IB | | 0.6 | 2 | µA | ±2.5V to ±15V | 2 |
| Input Voltage Range+ | | | 12 | 13.4 | V | VSUPPLY ±15V | 2 |
| Input Voltage Range+ | | | 2.5 | 3.4 | V | VSUPPLY ±5V | 2 |
| Input Voltage Range+ | | | 0.5 | 1.1 | V | VSUPPLY ±2.5V | 2 |
| Input Voltage Range- | | | -13.2 | -12 | V | VSUPPLY ±15V | 2 |
| Input Voltage Range- | | | -3.2 | -2.5 | V | VSUPPLY ±5V | 2 |
| Input Voltage Range- | | | -0.9 | -0.5 | V | VSUPPLY ±2.5V | 2 |
| Common Mode Rejection Ratio | CMRR | | 84 | 90 | dB | VCM = ±12V, VSUPPLY ±15V | 2 |
| Common Mode Rejection Ratio | CMRR | | 76 | 81 | dB | VCM = ±2.5V, VSUPPLY ±5V | 2 |
| Common Mode Rejection Ratio | CMRR | | 66 | 71 | dB | VCM = ±0.5V, VSUPPLY ±2.5V | 2 |
| Power Supply Rejection Ratio | PSRR | | 90 | 100 | dB | VS = ±2.5V to ±15V | 2 |
| Large-Signal Voltage Gain | AVOL | | 4.5 | 9 | V/mV | VOUT = ±12V, RL = 1k, VSUPPLY ±15V | 2 |
| Large-Signal Voltage Gain | AVOL | | 3 | 6.5 | V/mV | VOUT = ±10V, RL = 500Ω, VSUPPLY ±15V | 2 |
| Large-Signal Voltage Gain | AVOL | | 2 | 3.8 | V/mV | VOUT = ±7.5V, RL = 150Ω, VSUPPLY ±15V | 2 |
| Large-Signal Voltage Gain | AVOL | | 3 | 6.4 | V/mV | VOUT = ±2.5V, RL = 500Ω, VSUPPLY ±5V | 2 |
| Large-Signal Voltage Gain | AVOL | | 2 | 5.6 | V/mV | VOUT = ±2.5V, RL = 150Ω, VSUPPLY ±5V | 2 |
| Large-Signal Voltage Gain | AVOL | | 2.5 | 5.2 | V/mV | VOUT = ±1V, RL = 500Ω, VSUPPLY ±2.5V | 2 |
| Output Swing | VOUT | | 13.5 | 14 | ±V | RL = 1k, VIN = ±40mV, VSUPPLY ±15V | 3 |
| Output Swing | VOUT | | 13 | 13.7 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±15V | 3 |
| Output Swing | VOUT | | 3.5 | 4.1 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±5V | 3 |
| Output Swing | VOUT | | 3.4 | 3.8 | ±V | RL = 150Ω, VIN = ±40mV, VSUPPLY ±5V | 3 |
| Output Swing | VOUT | | 1.3 | 1.7 | ±V | RL = 500Ω, VIN = ±40mV, VSUPPLY ±2.5V | 3 |
| Output Current | IOUT | | 50 | 60 | mA | VOUT = ±7.5V, VSUPPLY ±15V | 3 |
| Output Current | IOUT | | 23 | 29 | mA | VOUT = ±3.4V, VSUPPLY ±5V | 3 |
| Short-Circuit Current | ISC | | 70 | 105 | mA | VOUT = 0V, VIN = ±3V, VSUPPLY ±15V | 3 |
| Slew Rate | SR | | 750 | 1000 | V/µs | AV = -2, VSUPPLY ±15V | 3 |
| Slew Rate | SR | | 300 | 450 | V/µs | AV = -2, VSUPPLY ±5V | 3 |
| Gain Bandwidth | GBW | | 70 | | MHz | f = 1MHz, VSUPPLY ±15V | 3 |
| Gain Bandwidth | GBW | | 50 | | MHz | f = 1MHz, VSUPPLY ±5V | 3 |
| Gain Bandwidth | GBW | | 40 | | MHz | f = 1MHz, VSUPPLY ±2.5V | 3 |
| Rise Time | tr | | 2.6 | | ns | AV = 1, 10%-90%, 0.1V, VSUPPLY ±15V | 3 |
| Rise Time | tr | | 3.6 | | ns | AV = 1, 10%-90%, 0.1V, VSUPPLY ±5V | 3 |
| Settling Time | ts | | 50 | | ns | 10V Step, 0.1%, AV = -1, VSUPPLY ±15V | 3 |
| Settling Time | ts | | 80 | | ns | 10V Step, 0.01%, AV = -1, VSUPPLY ±15V | 3 |
| Settling Time | ts | | 55 | | ns | 5V Step, 0.1%, AV = -1, VSUPPLY ±5V | 3 |
| Supply Current | IS | | 6.3 | 7.5 | mA | VSUPPLY ±15V | 3 |
| Supply Current | IS | | 6 | 7.2 | mA | VSUPPLY ±5V | 3 |
| Output Resistance | RO | | 0.7 | | Ω | AV = 1, f = 1MHz, VSUPPLY ±15V | 3 |
| Input Offset Voltage (0 to 70 C) | VOS | | 2 | | mV | 0°C ≤ TA ≤ 70°C, VSUPPLY ±15V | 3 |
| Input Offset Voltage (0 to 70 C) | VOS | | 2.2 | | mV | 0°C ≤ TA ≤ 70°C, VSUPPLY ±2.5V | 3 |
| Input VOS Drift | | | 10 | 13 | µV/°C | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 |
| Input Offset Current (0 to 70 C) | IOS | | 500 | | nA | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 |
| Input Bias Current (0 to 70 C) | IB | | 3 | | µA | ±2.5V to ±15V, 0°C ≤ TA ≤ 70°C | 3 |
| Supply Current (0 to 70 C) | IS | | 8.7 | | mA | VSUPPLY ±15V, 0°C ≤ TA ≤ 70°C | 4 |
| Supply Current (0 to 70 C) | IS | | 8.4 | | mA | VSUPPLY ±5V, 0°C ≤ TA ≤ 70°C | 4 |
| Total Supply Voltage (V+ to V-) | | | | 36 | V | | 2 |
| Differential Input Voltage (Transient Only) | | -10 | | 10 | V | Note 2, transient operation only | 2 |
| Operating Temperature Range | TA | -40 | | 85 | °C | Note 8 | 2 |
| Specified Temperature Range | | -40 | | 85 | °C | Note 9 | 2 |
| Maximum Junction Temperature (Plastic Package) | TJMAX | | | 150 | °C | Plastic package | 2 |
| Storage Temperature Range | | -65 | | 150 | °C | | 2 |
| Lead Temperature (Soldering, 10 sec) | | | | 300 | °C | Soldering, 10 sec | 2 |
| Thermal Resistance, Junction to Ambient | θJA | | 190 | | °C/W | S8 package (8-lead plastic SO) | 2 |
## CAD (KiCad official)
- Symbol: `LT1363CS8#PBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `lt1363cs8-pbf-etched.step` / `lt1363cs8-pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lt1363cs8-pbf.step` / `lt1363cs8-pbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Analog Devices datasheet](https://www.analog.com/media/en/technical-documentation/data-sheets/1363fa.pdf) (12 pp, sha256 `78ad3691b101ab45`, retrieved 2026-10-28, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lt1363cs8-pbf-datasheet.pdf)