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LT1357CS8#TRPBF

Public Made by Adom

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Analog Devices Operational Amplifier, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentoperational amplifier-comparatorlt1357cs8#trpbffactory-2.0.0extractor-text

Verified LT1357CS8#TRPBF

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1357CS8#TRPBF · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 12-page datasheet
  • ✓distributor: lcsc C663493, digikey LT1357CS8#TRPBFTR-ND, mouser 584-LT1357CS8#TRPBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-zqpc7eqz/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.12)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1357cs8-trpbf.kicad_sym✓ lt1357cs8-trpbf.kicad_mod✓ lt1357cs8-trpbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 6d ago
viewers lt1357cs8-trpbf: viewers · Ray 6d ago
lt1357cs8-trpbf-etched.glb Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf-etched.step lt1357cs8-trpbf: factory component page (tier=mfr) · Ray 6d ago
lt1357cs8-trpbf-hero.glb lt1357cs8-trpbf: hero GLB from the etched model (keeps the MPN mark) · Ray 6d ago
lt1357cs8-trpbf-hero.overlay.json Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf.glb Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf.kicad_mod Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf.kicad_sym Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf.lbr Publish 0.1.0 · Ray 6d ago
lt1357cs8-trpbf.step Publish 0.1.0 · Ray 6d ago
package.json Publish 0.1.0 · Ray 6d ago
page.json Set visibility: public · Ray 6d ago
README.md Publish 0.1.0 · Ray 6d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 6d ago

LT1357CS8#TRPBF

Analog Devices · Operational Amplifier · SO-8

LT1357CS8#TRPBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NULL passive Offset null pin, used with a 10k nulling potentiometer to trim input offset voltage (typical VOS 0.2mV, max 0.6mV at ±15V).
2 -IN input Inverting input; input voltage must not exceed ±VS and transient differential input is limited to ±10V.
3 +IN input Noninverting input; input voltage must not exceed ±VS and transient differential input is limited to ±10V.
4 V- power_in Negative supply; total supply voltage V+ to V- is limited to 36V maximum, with operation specified at ±2.5V, ±5V and ±15V.
5 NC unconnected No connect pin with no internal connection indicated by the datasheet.
6 VOUT output Amplifier output that drives 500Ω to ±12V minimum on ±15V supplies, with short-circuit current of 30mA minimum and indefinite short-circuit duration.
7 V+ power_in Positive supply; total supply voltage V+ to V- is limited to 36V maximum, with maximum supply current of 2.5mA at ±15V.
8 NULL passive Offset null pin, used with a 10k nulling potentiometer to trim input offset voltage (typical VOS 0.2mV, max 0.6mV at ±15V).

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Operational Amplifier/Comparator
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 0.2 0.6 mV VS=±15V, TA=25°C 2
Input Offset Voltage VOS 0.3 0.8 mV VS=±2.5V, TA=25°C 2
Input Offset Current IOS 40 120 nA VS=±2.5V to ±15V 2
Input Bias Current IB 120 500 nA VS=±2.5V to ±15V 2
Input Resistance RIN 35 80 MΩ VCM=±12V, VS=±15V 2
Input Voltage Range + 12 13.4 V VS=±15V 2
Input Voltage Range + 2.5 3.5 V VS=±5V 2
Input Voltage Range + 0.5 1.1 V VS=±2.5V 2
Input Voltage Range - -13.2 -12 V VS=±15V 2
Input Voltage Range - -3.3 -2.5 V VS=±5V 2
Input Voltage Range - -0.9 -0.5 V VS=±2.5V 2
Common Mode Rejection Ratio CMRR 80 97 dB VCM=±12V, VS=±15V 2
Common Mode Rejection Ratio CMRR 78 84 dB VCM=±2.5V, VS=±5V 2
Common Mode Rejection Ratio CMRR 68 75 dB VCM=±0.5V, VS=±2.5V 2
Power Supply Rejection Ratio PSRR 92 106 dB VS=±2.5V to ±15V 2
Large-Signal Voltage Gain AVOL 20 65 V/mV VOUT=±12V, RL=1k, VS=±15V 2
Large-Signal Voltage Gain AVOL 7 25 V/mV VOUT=±10V, RL=500Ω, VS=±15V 2
Large-Signal Voltage Gain AVOL 20 45 V/mV VOUT=±2.5V, RL=1k, VS=±5V 2
Large-Signal Voltage Gain AVOL 1.5 6 V/mV VOUT=±2.5V, RL=150Ω, VS=±5V 2
Large-Signal Voltage Gain AVOL 7 30 V/mV VOUT=±1V, RL=500Ω, VS=±2.5V 2
Output Swing VOUT 13.3 13.8 ±V RL=1k, VIN=±40mV, VS=±15V 3
Output Swing VOUT 12 12.8 ±V RL=500Ω, VIN=±40mV, VS=±15V 3
Output Swing VOUT 3.5 4 ±V RL=500Ω, VIN=±40mV, VS=±5V 3
Output Swing VOUT 2.5 3.3 ±V RL=150Ω, VIN=±40mV, VS=±5V 3
Output Swing VOUT 1.3 1.7 ±V RL=500Ω, VIN=±40mV, VS=±2.5V 3
Output Current IOUT 24 30 mA VOUT=±12V, VS=±15V 3
Output Current IOUT 16.7 25 mA VOUT=±2.5V, VS=±5V 3
Short-Circuit Current ISC 30 42 mA VOUT=0V, VIN=±3V, VS=±15V 3
Slew Rate SR 300 600 V/µs AV=-2, VS=±15V 3
Slew Rate SR 150 220 V/µs AV=-2, VS=±5V 3
Gain Bandwidth GBW 18 25 MHz f=200kHz, RL=2k, VS=±15V 3
Gain Bandwidth GBW 15 22 MHz f=200kHz, RL=2k, VS=±5V 3
Supply Current IS 2 2.5 mA VS=±15V 3
Supply Current IS 1.9 2.4 mA VS=±5V 3
Total Supply Voltage V+ to V- 36 V 2
Differential Input Voltage -10 10 V Transient only (Note 1) 2
Operating Temperature Range -40 85 °C 2
Maximum Junction Temperature TJMAX 150 °C Plastic package 2
Storage Temperature Range -65 150 °C 2
Lead Temperature 300 °C Soldering, 10 sec 2
Thermal Resistance Junction to Ambient θJA 190 °C/W S8 package 2
Input Offset Voltage VOS 0.8 mV VS=±15V, 0°C≤TA≤70°C 3
Input Offset Current IOS 180 nA VS=±2.5V to ±15V, 0°C≤TA≤70°C 3
Input Bias Current IB 750 nA VS=±2.5V to ±15V, 0°C≤TA≤70°C 3
Common Mode Rejection Ratio CMRR 79 dB VCM=±12V, VS=±15V, 0°C≤TA≤70°C 3
Power Supply Rejection Ratio PSRR 90 dB VS=±2.5V to ±15V, 0°C≤TA≤70°C 3
Large-Signal Voltage Gain AVOL 15 V/mV VOUT=±12V, RL=1k, VS=±15V, 0°C≤TA≤70°C 3
Supply Current IS 2.9 mA VS=±15V, 0°C≤TA≤70°C 4
Slew Rate SR 225 V/µs AV=-2, VS=±15V, 0°C≤TA≤70°C 4
Input Offset Voltage VOS 1.3 mV VS=±15V, -40°C≤TA≤85°C 4
Input Offset Current IOS 300 nA VS=±2.5V to ±15V, -40°C≤TA≤85°C 4
Input Bias Current IB 900 nA VS=±2.5V to ±15V, -40°C≤TA≤85°C 4
Supply Current IS 3 mA VS=±15V, -40°C≤TA≤85°C 4
Slew Rate SR 180 V/µs AV=-2, VS=±15V, -40°C≤TA≤85°C 4

CAD (KiCad official)

  • Symbol: LT1357CS8#TRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1357cs8-trpbf-etched.step / lt1357cs8-trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1357cs8-trpbf.step / lt1357cs8-trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (12 pp, sha256 b0b58d4537f27378, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF