LT1222CS8#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	NULL	passive	Offset null terminal for the suggested external offset-nulling circuit shown in the Applications Information, which must be removed when the LT1222 replaces other op amps.
2	-IN	input	Inverting input; differential input voltage is limited to ±6V and input voltage must stay within ±VS.
3	+IN	input	Non-inverting input; differential input voltage is limited to ±6V and input voltage must stay within ±VS.
4	V-	power_in	Negative supply rail; total supply voltage (V+ to V-) must not exceed 36V.
5	COMP	passive	Internal compensation node about one diode drop above the output that can source or sink 1.2mA; a capacitor to ground adjusts frequency response, and it can also be used to clamp the output swing.
6	VOUT	output	Amplifier output, which swings to at least ±12V into 500Ω and can be shorted indefinitely (a heat sink may be required when shorted).
7	V+	power_in	Positive supply rail; total supply voltage (V+ to V-) must not exceed 36V.
8	NULL	passive	Offset null terminal for the suggested external offset-nulling circuit shown in the Applications Information, which must be removed when the LT1222 replaces other op amps.

Key specifications

Parameter	Value
Manufacturer	Analog Devices
Package	SO-8
Category	Operational Amplifier/Comparator
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Offset Voltage	VOS		100	300	μV	TA = 25°C, VS = ±15V, VCM = 0V	2
Input Offset Current	IOS		100	300	nA	TA = 25°C, VS = ±15V, VCM = 0V	2
Input Bias Current	IB		100	300	nA	TA = 25°C, VS = ±15V, VCM = 0V	2
Input Resistance	RIN	20	45		MΩ	TA = 25°C, VS = ±15V, VCM = ±12V	2
Input Voltage Range (Positive)		12	14		V	TA = 25°C, VS = ±15V, VCM = 0V	2
Input Voltage Range (Negative)		-13	-12		V	TA = 25°C, VS = ±15V, VCM = 0V	2
Common Mode Rejection Ratio	CMRR	100	120		dB	TA = 25°C, VS = ±15V, VCM = ±12V	2
Power Supply Rejection Ratio	PSRR	98	110		dB	TA = 25°C, VS = ±5V to ±15V	2
Large-Signal Voltage Gain	AVOL	100	200		V/mV	TA = 25°C, VOUT = ±10V, RL = 500Ω	2
Output Swing	VOUT	12	13		±V	TA = 25°C, RL = 500Ω	2
Output Current	IOUT	24	26		mA	TA = 25°C, VOUT = ±12V	2
Slew Rate	SR	150	200		V/μs	TA = 25°C, Note 5	2
Supply Current	IS		8	10.5	mA	TA = 25°C, VS = ±15V	3
Input Offset Voltage (0°C to 70°C)	VOS		100	600	μV	● 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V	3
Input Offset Current (0°C to 70°C)	IOS		100	400	nA	● 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V	3
Input Bias Current (0°C to 70°C)	IB		100	400	nA	● 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V	3
Common Mode Rejection Ratio (0°C to 70°C)	CMRR	100	120		dB	● 0°C ≤ TA ≤ 70°C, VCM = ±12V	3
Power Supply Rejection Ratio (0°C to 70°C)	PSRR	98	110		dB	● 0°C ≤ TA ≤ 70°C, VS = ±5V to ±15V	3
Large-Signal Voltage Gain (0°C to 70°C)	AVOL	100	200		V/mV	● 0°C ≤ TA ≤ 70°C, VOUT = ±10V, RL = 500Ω	3
Output Swing (0°C to 70°C)	VOUT	12	13		±V	● 0°C ≤ TA ≤ 70°C, RL = 500Ω	3
Output Current (0°C to 70°C)	IOUT	24	26		mA	● 0°C ≤ TA ≤ 70°C, VOUT = ±12V	3
Slew Rate (0°C to 70°C)	SR	150	200		V/μs	● 0°C ≤ TA ≤ 70°C, Note 5	3
Supply Current (0°C to 70°C)	IS		8	11	mA	● 0°C ≤ TA ≤ 70°C, VS = ±15V	3
Total Supply Voltage (V+ to V-)				36	V		2
Differential Input Voltage		-6		6	V		2
Specified Temperature Range, LT1222C		0		70	°C	Note 3	2
Operating Temperature Range, LT1222C		-40		85	°C		2
Maximum Junction Temperature, Plastic Package	TJMAX			150	°C	Plastic package	2
Storage Temperature Range		-65		150	°C		2
Lead Temperature (Soldering)				300	°C	10 sec	2
Thermal Resistance, Junction to Ambient	θJA		190		°C/W	S8 package	2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part	Material	Colour / plating	Datasheet says	Page
contacts		tin	NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143, 1.651) OR TIN PLATE LEADS	9

CAD (KiCad official)

Symbol: LT1222CS8#PBF
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SO-8 (KiCad packages3D, STEP)
3D model files: lt1222cs8-pbf-etched.step / lt1222cs8-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1222cs8-pbf.step / lt1222cs8-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Analog Devices datasheet (12 pp, sha256 007f87cb6d8c057c, retrieved 2026-10-30, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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LT1222CS8#PBF

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