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LT1113CS8#PBF

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Analog Devices FET InputAmplifiers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierslt1113cs8#pbffactory-2.0.0extractor-text

Verified LT1113CS8#PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1113CS8#PBF · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 18-page datasheet
  • ✓distributor: lcsc C661621, digikey 505-LT1113CS8#PBF-ND, mouser 584-LT1113CS8#PBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-mojd9mbb/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.16)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1113cs8-pbf.kicad_sym✓ lt1113cs8-pbf.kicad_mod✓ lt1113cs8-pbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers lt1113cs8-pbf: viewers · Ray 4d ago
lt1113cs8-pbf-etched.glb Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf-etched.step lt1113cs8-pbf: factory component page (tier=mfr) · Ray 4d ago
lt1113cs8-pbf-hero.glb lt1113cs8-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
lt1113cs8-pbf-hero.overlay.json Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf.glb Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf.kicad_mod Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf.kicad_sym Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf.lbr Publish 0.1.0 · Ray 4d ago
lt1113cs8-pbf.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 4d ago

LT1113CS8#PBF

Analog Devices · FET InputAmplifiers · SOIC-8

LT1113CS8#PBF from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT A output Output of amplifier A; the LT1113 is unconditionally stable for gains of 1 or more, even with load capacitances up to 1000pF.
2 -IN A input Inverting input of amplifier A; the input voltage range is 13.0V to -10.5V (typical, AM/AC grade) at ±15V supplies.
3 +IN A input Non-inverting input of amplifier A; input bias current is 450pA max warmed up (AM/AC grade).
4 V- power_in Negative supply pin; the part is specified for supplies of ±4.5V to ±20V, with an absolute maximum supply voltage of ±20V.
5 +IN B input Non-inverting input of amplifier B; input bias current is 450pA max warmed up (AM/AC grade).
6 -IN B input Inverting input of amplifier B; the input voltage range is 13.0V to -10.5V (typical, AM/AC grade) at ±15V supplies.
7 OUT B output Output of amplifier B; the LT1113 is unconditionally stable for gains of 1 or more, even with load capacitances up to 1000pF.
8 V+ power_in Positive supply pin; the part is specified for supplies of ±4.5V to ±20V, with an absolute maximum supply voltage of ±20V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage (VS=±15V) VOS 0.5 1.8 mV VS = ±15V, VCM = 0V, TA = 25°C 3
Input Offset Voltage (VS=±5V) VOS 0.55 2 mV VS = ±5V, VCM = 0V, TA = 25°C 3
Input Offset Current, Warmed Up IOS 35 150 pA Warmed Up (Note 5), VS = ±15V, TA = 25°C 3
Input Bias Current, Warmed Up IB 320 480 pA Warmed Up (Note 5), VS = ±15V, TA = 25°C 3
Input Noise Voltage Density en 4.5 6 nV/√Hz fO = 1000Hz 3
Input Voltage Range, positive limit VCM 13 13.5 V Note 7, VS = ±15V, TA = 25°C 3
Input Voltage Range, negative limit VCM -10.5 -11 V Note 7, VS = ±15V, TA = 25°C 3
Common Mode Rejection Ratio CMRR 82 95 dB VCM = -10V to 13V, VS = ±15V, TA = 25°C 3
Power Supply Rejection Ratio PSRR 83 98 dB VS = ±4.5V to ±20V, TA = 25°C 3
Large-Signal Voltage Gain AVOL 1000 4500 V/mV VO = ±12V, RL = 10k, VS = ±15V, TA = 25°C 3
Large-Signal Voltage Gain AVOL 500 3000 V/mV VO = ±10V, RL = 1k, VS = ±15V, TA = 25°C 3
Output Voltage Swing (magnitude of ±) VOUT 13 13.8 V RL = 10k, VS = ±15V, TA = 25°C 3
Output Voltage Swing (magnitude of ±) VOUT 11.5 13 V RL = 1k, VS = ±15V, TA = 25°C 3
Slew Rate SR 2.3 3.9 V/µs RL ≥ 2k (Note 9), VS = ±15V, TA = 25°C 3
Gain Bandwidth Product GBW 4 5.6 MHz fO = 100kHz, VS = ±15V, TA = 25°C 3
Supply Current per Amplifier IS 5.3 6.5 mA VS = ±15V, TA = 25°C 3
Offset Voltage Match ∆VOS 0.8 3.3 mV VS = ±15V, TA = 25°C 3
Noninverting Bias Current Match, Warmed Up ∆IB+ 10 120 pA Warmed Up (Note 5), VS = ±15V, TA = 25°C 3
Common Mode Rejection Match ∆CMRR 78 94 dB Note 11, VS = ±15V, TA = 25°C 3
Power Supply Rejection Match ∆PSRR 80 95 dB Note 11, VS = ±15V, TA = 25°C 3
Input Offset Voltage (VS=±15V) VOS 0.7 2.5 mV 0°C ≤ TA ≤ 70°C, VS = ±15V, VCM = 0V 4
Average Input Offset Voltage Drift ∆VOS/∆Temp 8 20 µV/°C 0°C ≤ TA ≤ 70°C (Note 8) 4
Input Offset Current IOS 55 450 pA 0°C ≤ TA ≤ 70°C 4
Input Bias Current IB 700 1600 pA 0°C ≤ TA ≤ 70°C 4
Input Voltage Range, positive limit VCM 12.9 13.4 V 0°C ≤ TA ≤ 70°C 4
Input Voltage Range, negative limit VCM -10 -10.8 V 0°C ≤ TA ≤ 70°C 4
Common Mode Rejection Ratio CMRR 79 94 dB 0°C ≤ TA ≤ 70°C, VCM = -10V to 12.9V 4
Power Supply Rejection Ratio PSRR 81 97 dB 0°C ≤ TA ≤ 70°C, VS = ±4.5V to ±20V 4
Large-Signal Voltage Gain AVOL 800 3400 V/mV 0°C ≤ TA ≤ 70°C, VO = ±12V, RL = 10k 4
Large-Signal Voltage Gain AVOL 400 2400 V/mV 0°C ≤ TA ≤ 70°C, VO = ±10V, RL = 1k 4
Output Voltage Swing (magnitude of ±) VOUT 12.7 13.5 V 0°C ≤ TA ≤ 70°C, RL = 10k 4
Output Voltage Swing (magnitude of ±) VOUT 11.3 12.7 V 0°C ≤ TA ≤ 70°C, RL = 1k 4
Slew Rate SR 1.7 3.7 V/µs 0°C ≤ TA ≤ 70°C, RL ≥ 2k (Note 9) 4
Gain Bandwidth Product GBW 3.2 4.5 MHz 0°C ≤ TA ≤ 70°C, fO = 100kHz 4
Supply Current per Amplifier IS 5.3 6.55 mA 0°C ≤ TA ≤ 70°C, VS = ±15V 4
Input Offset Voltage (VS=±15V) VOS 0.8 2.8 mV -40°C ≤ TA ≤ 85°C, VS = ±15V, VCM = 0V 4
Input Offset Current IOS 90 1000 pA -40°C ≤ TA ≤ 85°C 4
Input Bias Current IB 1800 5000 pA -40°C ≤ TA ≤ 85°C 4
Input Voltage Range, positive limit VCM 12.6 13 V -40°C ≤ TA ≤ 85°C 4
Input Voltage Range, negative limit VCM -10 -10.5 V -40°C ≤ TA ≤ 85°C 4
Common Mode Rejection Ratio CMRR 78 93 dB -40°C ≤ TA ≤ 85°C, VCM = -10V to 12.6V 4
Power Supply Rejection Ratio PSRR 79 96 dB -40°C ≤ TA ≤ 85°C, VS = ±4.5V to ±20V 4
Large-Signal Voltage Gain AVOL 750 3000 V/mV -40°C ≤ TA ≤ 85°C, VO = ±12V, RL = 10k 4
Large-Signal Voltage Gain AVOL 300 2000 V/mV -40°C ≤ TA ≤ 85°C, VO = ±10V, RL = 1k 4
Output Voltage Swing (magnitude of ±) VOUT 12.5 12.5 V -40°C ≤ TA ≤ 85°C, RL = 10k 4
Output Voltage Swing (magnitude of ±) VOUT 11 12 V -40°C ≤ TA ≤ 85°C, RL = 1k 4
Slew Rate SR 1.6 3.5 V/µs -40°C ≤ TA ≤ 85°C, RL ≥ 2k 4
Gain Bandwidth Product GBW 2.9 4.3 MHz -40°C ≤ TA ≤ 85°C, fO = 100kHz 4
Supply Current per Amplifier IS 5.3 6.55 mA -40°C ≤ TA ≤ 85°C, VS = ±15V 5
Supply Voltage 20 V -55°C to 105°C (printed as ±20V) 2
Differential Input Voltage 40 V printed as ±40V 2
Input Voltage (equal to supply voltage) 20 V equal to supply voltage, printed as ±20V 2
Output Short Circuit Duration 1 Minute 2
Storage Temperature Range -65 150 °C 2
Lead Temperature 300 °C Soldering, 10 sec 2
Operating Temperature Range -40 85 °C LT1113C (Note 2) 2
Specified Temperature Range -40 85 °C LT1113C (Note 3); guaranteed 0°C to 70°C 2
Maximum Junction Temperature TJMAX 150 °C S8 package 2
Thermal Resistance, junction to ambient θJA 190 °C/W S8 package 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE OR TIN PLATE LEADS 15

CAD (KiCad official)

  • Symbol: LT1113CS8#PBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lt1113cs8-pbf-etched.step / lt1113cs8-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1113cs8-pbf.step / lt1113cs8-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (18 pp, sha256 86b68df6b72cca27, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF