component

LT1011IS8#PBF

Public Made by Adom

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Analog Devices Comparators, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierslt1011is8#pbffactory-2.0.0extractor-text

Verified LT1011IS8#PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1011IS8#PBF · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 20-page datasheet
  • ✓distributor: lcsc C661497, digikey LT1011IS8#PBF-ND, mouser 584-LT1011IS8#PBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-t20l5wyt/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.18)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1011is8-pbf.kicad_sym✓ lt1011is8-pbf.kicad_mod✓ lt1011is8-pbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 3d ago
viewers lt1011is8-pbf: viewers · Ray 3d ago
lt1011is8-pbf-etched.glb Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf-etched.step lt1011is8-pbf: factory component page (tier=mfr) · Ray 3d ago
lt1011is8-pbf-hero.glb lt1011is8-pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 3d ago
lt1011is8-pbf-hero.overlay.json Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf.glb Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf.kicad_mod Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf.kicad_sym Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf.lbr Publish 0.1.0 · Ray 3d ago
lt1011is8-pbf.step Publish 0.1.0 · Ray 3d ago
package.json Publish 0.1.0 · Ray 3d ago
page.json Set visibility: public · Ray 3d ago
README.md Publish 0.1.0 · Ray 3d ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 3d ago

LT1011IS8#PBF

Analog Devices · Comparators · SO-8

LT1011IS8#PBF from Analog Devices, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground; emitter of the floating output transistor, may be used as the output (inputs then reversed), and is rated up to 30V above V- (Pin 1 to Pin 4).
2 INPUT+ input Non-inverting input of the comparator.
3 INPUT- input Inverting input of the comparator.
4 V- power_in Negative supply voltage; supply (Pin 8 to Pin 4) is limited to 36V, and the output (Pin 7) may be up to 40V above it for the LT1011I.
5 BALANCE input Balance input used to adjust input offset voltage or add hysteresis; if unused, connect the BALANCE pins together with a 0.1µF capacitor.
6 BALANCE/STROBE input Strobe input that forces the output transistor off (high output at Pin 7) and can also adjust offset or add hysteresis; it must be current driven, not grounded, and is limited to 5V relative to Pin 8.
7 OUTPUT output Open-collector output of the comparator, with 50mA source/sink capability and up to 40V above V- for the LT1011I.
8 V+ power_in Positive supply voltage; the supply from Pin 8 to Pin 4 is limited to 36V.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SO-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 0.6 1.5 mV Note 4, TA=25°C 4
Input Offset Voltage (full temp) VOS 3 mV Note 4, over full operating temperature range 4
Input Offset Voltage RS ≤ 50k VOS 2 mV RS ≤ 50k (Note 5) 4
Input Offset Voltage RS ≤ 50k (full temp) VOS 3 mV RS ≤ 50k (Note 5), over full temperature range 4
Input Offset Current IOS 0.2 4 nA Note 5 4
Input Offset Current (full temp) IOS 6 nA Note 5, over full temperature range 4
Input Bias Current IB 20 50 nA Note 4 4
Input Bias Current (Note 5) IB 25 65 nA Note 5 4
Input Bias Current (Note 5, full temp) IB 80 nA Note 5, over full temperature range 4
Input Offset Voltage Drift ΔVOS/ΔT 4 25 µV/°C TMIN ≤ T ≤ TMAX (Note 6) 4
Large-Signal Voltage Gain AVOL 200 500 V/mV RL = 1k Connected to 15V, -10V ≤ VOUT ≤ 14.5V 4
Large-Signal Voltage Gain (single 5V) AVOL 50 300 V/mV RL = 500Ω Connected to 5V, VS = Single 5V, VGND = 0V, 0.5V ≤ VOUT ≤ 4.5V 4
Common Mode Rejection Ratio CMRR 90 115 dB 4
Input Voltage Range -14.5 13 V VS = ±15V 4
Input Voltage Range (single 5V) 0.5 3 V VS = Single 5V 4
Response Time tD 150 250 ns Note 7 4
Output Saturation Voltage VOL 0.25 0.4 V VIN = -5mV, ISINK = 8mA, TJ ≤ 100°C 4
Output Saturation Voltage VOL 0.25 0.45 V VIN = -5mV, ISINK = 8mA 4
Output Saturation Voltage VOL 0.7 1.5 V VIN = -5mV, ISINK = 50mA 4
Output Leakage Current 0.2 10 nA VIN = 5mV, VGND = -15V, VOUT = 20V 4
Output Leakage Current (full temp) 500 nA VIN = 5mV, VGND = -15V, VOUT = 20V, over full temperature range 4
Positive Supply Current 3.2 4 mA VGND = 0 4
Negative Supply Current 1.7 2.5 mA VGND = 0 4
Strobe Current 500 µA Minimum to Ensure Output Transistor is Off, VGND = 0 (Note 8) 4
Input Capacitance 6 pF 4
Supply Voltage (Pin 8 to Pin 4) 36 V 2
Output to Negative Supply (Pin 7 to Pin 4) 40 V LT1011AI, LT1011I 2
Differential Input Voltage -36 36 V 2
Voltage at STROBE Pin (Pin 6 to Pin 8) 5 V 2
Output Short-Circuit Duration 10 sec 2
Operating Temperature Range -40 85 °C LT1011AI, LT1011I (Note 3) 2
Storage Temperature Range -65 150 °C 2
Maximum Junction Temperature TJMAX 150 °C S8 package 2
Thermal Resistance Junction-to-Ambient θJA 150 °C/W S8 package 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143, 1.651) OR TIN PLATE LEADS 17

CAD (KiCad official)

  • Symbol: LT1011IS8#PBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: lt1011is8-pbf-etched.step / lt1011is8-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1011is8-pbf.step / lt1011is8-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (20 pp, sha256 4f62b30381cd4dfd, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF