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LT1009IDR

Public Made by Adom

by adom

Texas Instruments Voltage Reference, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs lt1009idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
viewers lt1009idr: viewers · Ray 9d ago
lt1009idr-etched.fit.json lt1009idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lt1009idr-etched.glb lt1009idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lt1009idr-etched.step lt1009idr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 3d ago
lt1009idr.glb Publish 0.1.0 · Ray 9d ago
lt1009idr.kicad_mod Publish 0.1.0 · Ray 9d ago
lt1009idr.kicad_sym Publish 0.1.0 · Ray 9d ago
lt1009idr.lbr Publish 0.1.0 · Ray 9d ago
lt1009idr.step Publish 0.1.0 · Ray 9d ago
package.json Publish 0.1.0 · Ray 9d ago
page.json Set visibility: public · Ray 9d ago
README.md Initial commit: component/lt1009idr · Ray 9d ago

LT1009IDR

Texas Instruments · Voltage Reference · SOIC-8

LT1009IDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection.
2 NC unconnected No internal connection.
3 NC unconnected No internal connection.
4 ANODE power_in Anode terminal; receives reverse-bias supply voltage through current-limiting resistor for 2.5-V reference generation.
5 ADJ input Adjustment terminal; accepts voltage input from GND to VZ for ±5% reference voltage adjustment without affecting temperature coefficient.
6 CATHODE power_out Cathode terminal (primary); outputs regulated 2.5-V reference voltage with maximum initial tolerance of ±10 mV in D and PW packages.
7 NC unconnected No internal connection.
8 CATHODE power_out Cathode terminal (secondary); internally connected to Pin 6 to provide redundant reference output path.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: LT1009IDR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lt1009idr-etched.step / lt1009idr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1009idr.step / lt1009idr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 0de77fb68649fe68, retrieved 2026-09-26, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF