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LT1007IS8#PBF

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Analog Devices Precision OpAmps, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentamplifierslt1007is8#pbffactory-2.0.0extractor-text

Verified LT1007IS8#PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: LT1007IS8#PBF · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 16-page datasheet
  • ✓distributor: lcsc C661488, digikey 505-LT1007IS8#PBF-ND, mouser 584-LT1007IS8#PBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-88cdtdjc/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.15)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ lt1007is8-pbf.kicad_sym✓ lt1007is8-pbf.kicad_mod✓ lt1007is8-pbf.step
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Ray Publish 0.1.0 5b14536 4d ago

LT1007IS8#PBF

Analog Devices · Precision OpAmps · SOIC-8

LT1007IS8#PBF from Analog Devices, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOS TRIM passive Offset voltage null terminal; a 10kΩ nulling potentiometer between pins 1 and 8 gives approximately ±2.5mV adjustment range.
2 -IN input Inverting input; inputs are protected by back-to-back diodes, so input current should be limited to 25mA if differential input voltage exceeds ±0.7V.
3 +IN input Noninverting input; inputs are protected by back-to-back diodes, so input current should be limited to 25mA if differential input voltage exceeds ±0.7V.
4 V- power_in Negative supply; supply voltage is rated up to ±22V absolute maximum.
5 NC unconnected No internal connection.
6 OUT output Amplifier output with indefinite short-circuit duration and a typical swing of ±13.5V or more into RL ≥ 2k at VS = ±15V.
7 V+ power_in Positive supply; supply voltage is rated up to ±22V absolute maximum.
8 VOS TRIM passive Offset voltage null terminal; a 10kΩ nulling potentiometer between pins 1 and 8 gives approximately ±2.5mV adjustment range.

Key specifications

Parameter Value
Manufacturer Analog Devices
Package SOIC-8
Category Amplifiers
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Offset Voltage VOS 20 60 µV VS=±15V, TA=25°C (Note 2) 2
Long Term Input Offset Voltage Stability ΔVOS/ΔTime 0.2 1 µV/Mo Notes 3, 4 2
Input Offset Current IOS 12 50 nA VS=±15V, TA=25°C 2
Input Bias Current IB -55 55 nA printed ±15 typ, ±55 max 2
Input Noise Voltage 0.1Hz to 10Hz en 0.06 0.13 µVP-P 0.1Hz to 10Hz (Notes 4, 6) 2
Input Noise Voltage Density en 2.8 4.5 nV/√Hz fO = 10Hz (Notes 4, 5) 2
Input Noise Voltage Density en 2.5 3.8 nV/√Hz fO = 1000Hz (Note 4) 2
Input Noise Current Density in 1.5 4 pA/√Hz fO = 10Hz (Notes 4, 7) 2
Input Noise Current Density in 0.4 0.6 pA/√Hz fO = 1000Hz (Notes 4, 7) 2
Input Resistance, Common Mode 5 GΩ 3
Input Voltage Range -11 11 V printed ±11.0 min, ±12.5 typ 3
Common Mode Rejection Ratio CMRR 110 126 dB VCM = ±11V 3
Power Supply Rejection Ratio PSRR 106 126 dB VS = ±4V to ±18V 3
Large-Signal Voltage Gain AVOL 5 20 V/µV RL ≥ 2k, VO = ±12V 3
Large-Signal Voltage Gain AVOL 3.5 16 V/µV RL ≥ 1k, VO = ±10V 3
Large-Signal Voltage Gain AVOL 2 12 V/µV RL ≥ 600Ω, VO = ±10V 3
Maximum Output Voltage Swing VOUT 12.5 13.5 V RL ≥ 2k (±) 3
Maximum Output Voltage Swing VOUT 10.5 12.5 V RL ≥ 600Ω (±) 3
Slew Rate SR 1.7 2.5 V/µs LT1007, RL ≥ 2k 3
Gain Bandwidth Product GBW 5 8 MHz LT1007, fO = 100kHz (Note 8) 3
Open-Loop Output Resistance ZO 70 Ω VO = 0V, IO = 0 3
Power Dissipation PD 80 140 mW LT1007 3
Input Offset Voltage over temperature VOS 40 125 µV -40°C ≤ TA ≤ 85°C, VS=±15V (Note 2) 4
Average Input Offset Drift ΔVOS/ΔTemp 0.3 1 µV/°C -40°C ≤ TA ≤ 85°C (Note 10) 4
Input Offset Current over temperature IOS 20 80 nA -40°C ≤ TA ≤ 85°C 4
Input Bias Current over temperature IB -90 90 nA -40°C ≤ TA ≤ 85°C; printed ±25 typ, ±90 max 4
Input Voltage Range over temperature -10 10 V -40°C ≤ TA ≤ 85°C; printed ±10 min, ±11.7 typ 4
Common Mode Rejection Ratio over temperature CMRR 105 120 dB VCM = ±10.5V, -40°C ≤ TA ≤ 85°C 4
Power Supply Rejection Ratio over temperature PSRR 101 120 dB VS = ±4.5V to ±18V, -40°C ≤ TA ≤ 85°C 4
Large-Signal Voltage Gain over temperature AVOL 2 15 V/µV RL ≥ 2k, VO = ±10V, -40°C ≤ TA ≤ 85°C 4
Large-Signal Voltage Gain over temperature AVOL 1.5 12 V/µV RL ≥ 1k, VO = ±10V, -40°C ≤ TA ≤ 85°C 4
Maximum Output Voltage Swing over temperature VOUT 12 13.6 V RL ≥ 2k (±), -40°C ≤ TA ≤ 85°C 4
Power Dissipation over temperature PD 95 165 mW -40°C ≤ TA ≤ 85°C 4
Supply Voltage -22 22 V ±22V 2
Differential Input Current -25 25 mA Note 9 2
Storage Temperature Range -65 150 °C 2
Lead Temperature (Soldering, 10 sec.) 300 °C 2
Operating Temperature Range -40 85 °C LT1007I 2
Maximum Junction Temperature TJMAX 150 °C S8 package 2
Thermal Resistance, Junction to Ambient θJA 190 °C/W S8 package 2

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts tin NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE (1.143, 1.651) OR TIN PLATE LEADS 14

CAD (KiCad official)

  • Symbol: LT1007IS8#PBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: lt1007is8-pbf-etched.step / lt1007is8-pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lt1007is8-pbf.step / lt1007is8-pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Analog Devices datasheet (16 pp, sha256 2b7b412f54486c64, retrieved 2026-10-30, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF