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LRC099-04AT1G

LRC · ESD And Surge Protection (TVS/ESD) · TSOP-6

LRC099-04AT1G from LRC, in a TSOP-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 passive ESD-protected channel 1 I/O line with 0.9pF (max) capacitance to GND and VRWM of 5V to GND.
2 GND power_in Negative rail of the diode array, connected to system ground, with ESD current steered to it through the ESD diodes and zener diode.
3 I/O2 passive ESD-protected channel 2 I/O line with 0.9pF (max) capacitance to GND and VRWM of 5V to GND.
4 I/O4 passive ESD-protected channel 4 I/O line with 0.9pF (max) capacitance to GND and VRWM of 5V to GND.
5 VREF power_in Positive supply rail of the diode array, with an integrated zener diode between it and GND that clamps positive ESD voltage to the zener voltage.
6 I/O3 passive ESD-protected channel 3 I/O line with 0.9pF (max) capacitance to GND and VRWM of 5V to GND.

Key specifications

Parameter Value
Manufacturer LRC
Package TSOP-6
Category Circuit Protection
Pins 6

CAD (KiCad official)

  • Symbol: LRC099-04AT1G
  • Footprint: Package_SO:TSOP-6_1.65x3.05mm_P0.95mm
  • 3D model: TSOP-6 (KiCad packages3D, STEP)
  • 3D model files: lrc099-04at1g-etched.step / lrc099-04at1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lrc099-04at1g.step / lrc099-04at1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 fb325da77023fa25, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF