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Contents

README

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LR8323A-T50

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

LR8323A-T50 from LR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground pin; all voltages are referenced to GND.
2 VOUT power_out Regulated output (fixed 5.0V for the T50 option) delivering up to 300mA, needs at least a 1uF ceramic output capacitor.
3 VIN power_in Supply input rated for operating voltage up to 24V (absolute maximum 32V), needs at least a 1uF ceramic bypass capacitor.

Key specifications

Parameter Value
Manufacturer LR
Package SOT-23-3L
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage tolerance -1 1 % VIN=VOUT+1V, IOUT=10mA; printed as VOUT0.99 to VOUT1.01 4
Input voltage VIN 24 V ISS=5uA 4
Enable-on voltage VCE 0.7 1.2 V VIN=2.2V, IOUT=1mA 4
Line regulation △VOUT -10 10 mV VOUT+1V≤VIN≤24V, IOUT=5mA 4
Load regulation △VOUT -50 50 mV VIN=VOUT+1V, 1mA≤IOUT≤100mA 4
Minimum dropout voltage VDrop 130 150 170 mV IOUT=50mA, △VOUT=±1%*VOUT 4
Minimum dropout voltage VDrop 230 250 270 mV IOUT150mA, △VOUT=±1%*VOUT 5
Shutdown current ISHD -1 1 uA VIN=VOUT+1V, VCE=0V 5
Output voltage temperature coefficient △VOUT/(△Ta*VOUT) 50 100 ppm/℃ VIN=VOUT+1V, IOUT=10mA, -40℃≤Ta≤85℃ 5
Maximum input supply voltage VIN 32 V 4
Maximum output current IOUT 420 mA 4
Power dissipation (SOT23) PD 250 mW SOT23 package 4
Operating temperature TOPR -40 105 ℃ 4
Storage temperature TSTG -40 125 ℃ 4
ESD rating (human body model) -3000 3000 V H.B.M POS/NEG 4
Maximum junction temperature 150 ℃ 8
Recommended maximum junction temperature 125 ℃ recommended for normal operation 8
Junction-to-ambient thermal resistance θJA 500 ℃/W SOT23-3L package 8
Input capacitor CIN 1 μF ceramic capacitor recommended 8
Output capacitor COUT 1 μF ceramic capacitor 8
Series resistor at LDO input 10 Ω LDO input, recommended series resistor 10
Output voltage VOUT 5 V VIN=VOUT+1V, IOUT=10mA; printed limits VOUT0.99 / VOUT1.01 4

CAD (KiCad official)

  • Symbol: LR8323A-T50
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: lr8323a-t50-etched.step / lr8323a-t50-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr8323a-t50.step / lr8323a-t50.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LR datasheet (13 pp, sha256 f85df1de052642f3, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF