component
LR8103A-T18
Public Made by Adomby adom
LR Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLR8103A-T18
LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L
LR8103A-T18 from LR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference; all voltages in the datasheet are specified relative to GND. |
| 2 | VOUT | power_out | Regulated output, fixed at 1.8V for the LR8103A-T18 with 300mA typical output current; short-circuit protection engages below 0.7V with a 30mA typical limit. |
| 3 | VIN | power_in | Input supply, rated 6.5V maximum for regulation (absolute maximum 9V); a input bypass capacitor of at least 1uF ceramic is recommended. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LR |
| Package | SOT-23-3L |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Maximum input supply voltage | VIN | 9 | V | 4 | |||
| Maximum output current | IOUT | 450 | mA | 4 | |||
| Power dissipation | PD | 250 | mW | SOT23-3L | 4 | ||
| Operating temperature | TOPR | -10 | 85 | ℃ | 4 | ||
| Storage temperature | TSTG | -40 | 125 | ℃ | 4 | ||
| ESD human body model | -2000 | 2000 | V | H.B.M POS/NEG | 4 | ||
| Input voltage | VIN | 6.5 | V | ISS=1uA | 4 | ||
| Output voltage accuracy (printed ±1%) | VOUT | -1 | 1 | % | VIN=VCE=VOUT+1V, IOUT=10mA | 4 | |
| Enable voltage | VCE | 0.7 | 1.2 | V | VIN=2.2V, IOUT=1mA | 4 | |
| Line regulation | ΔVOUT | -30 | 30 | mV | VOUT+1V≤VIN≤6.5V, VIN=VCE, IOUT=10mA | 4 | |
| Load regulation | ΔVOUT | -40 | 40 | mV | VIN=VCE=VOUT+1V, 1mA≤IOUT≤100mA | 4 | |
| Shutdown current | ISHD | -1 | 1 | uA | VIN=VOUT+1V, VCE=0V | 5 | |
| Quiescent current | ISS | 0.8 | 1 | uA | VIN=VCE=VOUT+1V | 5 | |
| Output voltage temperature coefficient | ΔVOUT/(ΔTa*VOUT) | -100 | 50 | 100 | ppm/℃ | VIN=VCE=VOUT+1V, IOUT=10mA, -40℃≤Ta≤85℃ | 5 |
| Maximum junction temperature (absolute maximum rating) | TJ(MAX) | 150 | °C | 6 | |||
| Recommended maximum junction temperature for reliability | TJ(MAX) | 125 | °C | Normal operation | 6 | ||
| Input capacitor (recommended minimum) | CIN | 1 | uF | Ceramic, see section 9.1 | 6 | ||
| Output capacitor (recommended minimum) | COUT | 1 | uF | Ceramic, see section 9.1 | 6 | ||
| Thermal resistance, junction to ambient | θJA | 500 | °C/W | SOT23-3L | 6 |
CAD (KiCad official)
- Symbol:
LR8103A-T18 - Footprint:
Package_TO_SOT_SMD:SOT-23-3 - 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files:
lr8103a-t18-etched.step/lr8103a-t18-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lr8103a-t18.step/lr8103a-t18.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LR datasheet (10 pp, sha256
1164d007f79e861e, retrieved 2026-10-16, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).