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LR8103A-T15

Public Made by Adom

by adom

LR Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-3L. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LR8103A-T15

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

LR8103A-T15 from LR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference; all voltages in the datasheet are specified relative to GND.
2 VOUT power_out Regulated 1.5 V output for the T15 variant, rated for up to 300 mA output current, and requires a ceramic output capacitor of at least 1 µF.
3 VIN power_in Supply input with a 6.5 V rated input voltage (absolute maximum 9 V), requiring a ceramic bypass capacitor of at least 1 µF.

Key specifications

Parameter Value
Manufacturer LR
Package SOT-23-3L
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum input supply voltage VIN 9 V 4
Maximum output current IOUT 450 mA 4
Power dissipation (SOT23-3L) PD 250 mW 4
Operating temperature TOPR -10 85 ℃ 4
Storage temperature TSTG -40 125 ℃ 4
ESD human body model (H.B.M) -2000 2000 V H.B.M POS/NEG 4
Input voltage VIN 6.5 V ISS=1uA 4
Output voltage accuracy VOUT -1 1 % 1
Enable voltage VCE 0.7 1.2 V VIN=2.2V, IOUT=1mA 4
Line regulation ΔVOUT -30 30 mV VOUT+1V≤VIN≤6.5V, VIN=VCE, IOUT=10mA 4
Load regulation ΔVOUT -40 40 mV VIN=VCE=VOUT+1V, 1mA≤IOUT≤100mA 4
Shutdown current ISHD -1 1 uA VIN=VOUT+1V, VCE=0V 5
Temperature coefficient ΔVOUT/(ΔTa*VOUT) -100 50 100 ppm/℃ VIN=VCE=VOUT+1V, IOUT=10mA, -40℃≤Ta≤85℃ 5
Output current IOUT 300 mA VIN=VCE=VOUT+1V 4
Quiescent current ISS 0.8 1 uA VIN=VCE=VOUT+1V 5
Minimum dropout voltage (50 mA) VDROP 150 mV VIN=VCE, IOUT=50mA, ΔVOUT=±2%*VOUT 5
Minimum dropout voltage (100 mA) VDROP 320 mV VIN=VCE, IOUT=100mA, ΔVOUT=±2%*VOUT 5
Power supply rejection ratio (100 Hz) PSRR 75 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=100Hz 5
Power supply rejection ratio (1 kHz) PSRR 55 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=1kHz 5
Power supply rejection ratio (10 kHz) PSRR 40 dB VIN=VCE=VOUT+1V, IOUT=10mA, f=10kHz 5
Short-circuit current ISCP 30 mA VOUT=GND 5
Maximum junction temperature (absolute) TJ 150 °C 6
Recommended maximum junction temperature TJ 125 °C Normal operation 6
Input capacitor 1 uF Ceramic, low ESR, at input pin 6
Output capacitor 1 uF Ceramic 6
Thermal resistance junction-to-ambient θJA 500 °C/W SOT23-3L 6
Input series resistor 10 Ω Recommended at LDO input to absorb input spikes 8

CAD (KiCad official)

  • Symbol: LR8103A-T15
  • Footprint: Package_TO_SOT_SMD:SOT-23-3
  • 3D model: SOT-23-3L (KiCad packages3D, STEP)
  • 3D model files: lr8103a-t15-etched.step / lr8103a-t15-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr8103a-t15.step / lr8103a-t15.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LR datasheet (10 pp, sha256 e2b9c2880c1f95e9, retrieved 2026-10-16, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF