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LR7527-M

Public Made by Adom

by adom

LR Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)lr7527-mfactory-2.0.0extractor-text
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Datasheet

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Contents

README

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LR7527-M

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

LR7527-M from LR, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VSS power_in Ground pin (labelled VSS in the pin assignment, GND in the block diagram), reference for all voltage values.
2 VIN power_in Regulator input supply, operating up to 24V (absolute maximum 32V), with a bypass capacitor connected close to the pin.
3 VOUT power_out Fixed 2.7V regulated output delivering 100mA with ±2% accuracy, with a 1-10uF output capacitor recommended and short-circuit current limited to 20mA.

Key specifications

Parameter Value
Manufacturer LR
Package SOT-89-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage VIN 24 V ISS=5uA 5
Output voltage accuracy (tolerance) -2 2 % 1
Output Current IOUT 100 mA VIN= VOUT+2V 5
Line Regulation ΔVOUT -30 30 mV VOUT+2V≤VIN≤24V, IOUT=5mA 5
Load Regulation ΔVOUT -50 50 mV VIN= VOUT+2V, 1mA≤IOUT≤100mA 5
Dropout Voltage VDrop 320 390 450 mV IOUT=50mA, ΔVOUT=±2%*VOUT 5
Dropout Voltage VDrop 600 750 900 mV IOUT=100mA, ΔVOUT=±2%*VOUT 5
Power Supply Rejection Ratio PSRR 75 dB VIN= VOUT+2V, IOUT=10mA, f=100Hz 5
Power Supply Rejection Ratio PSRR 55 dB VIN= VOUT+2V, IOUT=10mA, f=1kHz 5
Power Supply Rejection Ratio PSRR 40 dB VIN= VOUT+2V, IOUT=10mA, f=10kHz 5
Quiescent Current ISS 1.5 5 uA VIN= VOUT+2V 5
Short-circuit Current ISCP 20 mA VOUT=GND 5
Over Current IOCP 120 mA 5
Temperature Coefficient ΔVOUT/(ΔTa*VOUT) -100 50 100 ppm/℃ VIN= VOUT+2V, IOUT=10mA, -40℃≤Ta≤85℃; printed ±50 (typ) and ±100 (max) 5
Maximum Input Voltage VIN 32 V 4
Maximum Output Voltage (row labelled IOUT) IOUT 150 mA 4
Operating Temperature TOPR -40 105 ℃ 4
Storage Temperature TSTG -40 125 ℃ 4
ESD Human Body Model -3000 3000 V H.B.M POS/NEG 4
Junction-to-ambient thermal resistance (SOT89-3) θJA 200 °C/W SOT89-3 package 8

CAD (KiCad official)

  • Symbol: LR7527-M
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: lr7527-m-etched.step / lr7527-m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr7527-m.step / lr7527-m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LR datasheet (13 pp, sha256 0b58c65ef75e4ef4, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF