LR7525-T

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

LR7525-T from LR, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VSS	power_in	Ground pin (labelled VSS in the SOT23-3L pin drawing, GND in the block diagram), the common return for input and output.
2	VOUT	power_out	Regulated 2.5V output (±2% at VIN=VOUT+2V, IOUT=10mA) delivering 100mA typical, with a 1-10uF output capacitor recommended.
3	VIN	power_in	Input supply pin accepting up to 24V operating (32V absolute maximum), with a bypass capacitor of 1-10uF recommended close to the pin.

Key specifications

Parameter	Value
Manufacturer	LR
Package	SOT-23-3
Category	Power Management (PMIC)
Pins	3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Voltage	VIN			24	V	ISS=5uA	5
Line Regulation	ΔVOUT	-30		30	mV	VOUT+2V≤VIN≤24V, IOUT=5mA	5
Load Regulation	ΔVOUT	-50		50	mV	VIN=VOUT+2V, 1mA≤IOUT≤100mA	5
Dropout Voltage	VDrop	320	390	450	mV	IOUT=50mA, ΔVOUT=±2%*VOUT	5
Dropout Voltage	VDrop	600	750	900	mV	IOUT=100mA, ΔVOUT=±2%*VOUT	5
Quiescent Current	ISS		1.5	5	uA	VIN=VOUT+2V	5
Temperature Coefficient	ΔVOUT/(ΔTa*VOUT)	-100	50	100	ppm/℃	VIN=VOUT+2V, IOUT=10mA, -40℃≤Ta≤85℃	5
Maximum Input Voltage	VIN			32	V	Test at room temperature	4
Maximum Output Voltage (as printed)	IOUT			150	mA	Test at room temperature	4
Power Dissipation	PD			250	mW	SOT23B package as printed	4
Operating Temperature	TOPR	-40		105	℃		4
Storage Temperature	TSTG	-40		125	℃		4
ESD Human Body Model		-3000		3000	V	H.B.M POS/NEG	4
Junction-to-Ambient Thermal Resistance	θJA		500		°C/W	SOT23-3L	8

CAD (KiCad official)

Symbol: LR7525-T
Footprint: Package_TO_SOT_SMD:SOT-23-3
3D model: SOT-23-3 (KiCad packages3D, STEP)
3D model files: lr7525-t-etched.step / lr7525-t-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr7525-t.step / lr7525-t.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: LR datasheet (13 pp, sha256 0b58c65ef75e4ef4, retrieved 2026-10-17, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# LR7525-T

**LR** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3

LR7525-T from LR, in a SOT-23-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground pin (labelled VSS in the SOT23-3L pin drawing, GND in the block diagram), the common return for input and output. |
| 2 | VOUT | power_out | Regulated 2.5V output (±2% at VIN=VOUT+2V, IOUT=10mA) delivering 100mA typical, with a 1-10uF output capacitor recommended. |
| 3 | VIN | power_in | Input supply pin accepting up to 24V operating (32V absolute maximum), with a bypass capacitor of 1-10uF recommended close to the pin. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LR |
| Package | SOT-23-3 |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage | VIN |  |  | 24 | V | ISS=5uA | 5 |
| Line Regulation | ΔVOUT | -30 |  | 30 | mV | VOUT+2V≤VIN≤24V, IOUT=5mA | 5 |
| Load Regulation | ΔVOUT | -50 |  | 50 | mV | VIN=VOUT+2V, 1mA≤IOUT≤100mA | 5 |
| Dropout Voltage | VDrop | 320 | 390 | 450 | mV | IOUT=50mA, ΔVOUT=±2%*VOUT | 5 |
| Dropout Voltage | VDrop | 600 | 750 | 900 | mV | IOUT=100mA, ΔVOUT=±2%*VOUT | 5 |
| Quiescent Current | ISS |  | 1.5 | 5 | uA | VIN=VOUT+2V | 5 |
| Temperature Coefficient | ΔVOUT/(ΔTa*VOUT) | -100 | 50 | 100 | ppm/℃ | VIN=VOUT+2V, IOUT=10mA, -40℃≤Ta≤85℃ | 5 |
| Maximum Input Voltage | VIN |  |  | 32 | V | Test at room temperature | 4 |
| Maximum Output Voltage (as printed) | IOUT |  |  | 150 | mA | Test at room temperature | 4 |
| Power Dissipation | PD |  |  | 250 | mW | SOT23B package as printed | 4 |
| Operating Temperature | TOPR | -40 |  | 105 | ℃ |  | 4 |
| Storage Temperature | TSTG | -40 |  | 125 | ℃ |  | 4 |
| ESD Human Body Model |  | -3000 |  | 3000 | V | H.B.M POS/NEG | 4 |
| Junction-to-Ambient Thermal Resistance | θJA |  | 500 |  | °C/W | SOT23-3L | 8 |

## CAD (KiCad official)

- Symbol: `LR7525-T`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3 (KiCad packages3D, STEP)
- 3D model files: `lr7525-t-etched.step` / `lr7525-t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lr7525-t.step` / `lr7525-t.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LR datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8757911078112243712) (13 pp, sha256 `0b58c65ef75e4ef4`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lr7525-t-datasheet.pdf)