component

LR7525-M

Public Made by Adom

by adom

LR Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-89-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LR7525-M

LR · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-89-3

LR7525-M from LR, in a SOT-89-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the regulator; all voltages are specified relative to GND.
2 VIN power_in Input supply, operating up to 24V (absolute maximum 32V), with an input bypass ceramic capacitor of at least 1uF required.
3 VOUT power_out Fixed regulated output (2.5V for LR7525) delivering 100mA typical with ±2% accuracy, with an output capacitor of at least 1uF required, and over-current limit of 120mA and short-circuit current of 20mA.

Key specifications

Parameter Value
Manufacturer LR
Package SOT-89-3
Category Power Management (PMIC)
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Maximum input supply voltage VIN 32 V 4
Maximum output current IOUT 160 mA 4
Power dissipation (SOT89-3) PD 500 mW SOT89-3 package 4
Operating temperature TOPR -10 85 ℃ 4
Storage temperature TSTG -40 125 ℃ 4
ESD HBM (positive/negative) -3000 3000 V H.B.M POS/NEG 4
Input voltage VIN 24 V ISS=5uA 4
Output voltage (2.5V nominal) VOUT 2.5 V VIN=VOUT+2V, IOUT=10mA 4
Output voltage tolerance VOUT -2 2 % VIN=VOUT+2V, IOUT=10mA 4
Line regulation △VOUT -30 30 mV VOUT+2V≤VIN≤24V, IOUT=5mA 4
Load regulation △VOUT -50 50 mV VIN=VOUT+2V, 1mA≤IOUT≤100mA 4
Dropout voltage VDrop 300 360 420 mV IOUT=50mA, △VOUT=±2%*VOUT 4
Dropout voltage VDrop 600 750 900 mV IOUT=100mA, △VOUT=±2%*VOUT 4
Quiescent current ISS 1.5 5 uA VIN=VOUT+2V 5
Output voltage temperature coefficient △VOUT/(△Ta*VOUT) -100 50 100 ppm/℃ VIN=VOUT+2V, IOUT=10mA, -40℃≤Ta≤85℃ 5
Maximum junction temperature (recommended) TJ 125 ℃ normal operation 7
Maximum junction temperature (absolute) TJ(MAX) 150 ℃ 7
Thermal resistance junction to ambient (SOT89-3) θJA 200 ℃/W SOT89-3 7
Input capacitor (recommended minimum) CIN 1 uF ceramic, recommended at input 7
Output capacitor (recommended minimum) COUT 1 uF ceramic 7
Input and output capacitor (layout guidance) CIN=COUT 1 10 uF placed as close to LDO as possible 9

CAD (KiCad official)

  • Symbol: LR7525-M
  • Footprint: Package_TO_SOT_SMD:SOT-89-3
  • 3D model: SOT-89-3 (KiCad packages3D, STEP)
  • 3D model files: lr7525-m-etched.step / lr7525-m-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr7525-m.step / lr7525-m.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LR datasheet (11 pp, sha256 72d6c7d5d6de2f15, retrieved 2026-10-19, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF