# LR6206A-T15

**LR** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-3L

LR6206A-T15 from LR, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VSS | power_in | Ground reference pin; all voltages in the datasheet are referenced to VSS unless stated otherwise. |
| 2 | VOUT | power_out | Regulated output (1.5 V for the LR6206A-T15); the datasheet specifies an output current of 300 mA typical with a minimum 1 µF ceramic output capacitor required. |
| 3 | VIN | power_in | Unregulated input supply, rated to a maximum of 6.5 V in electrical characteristics (9 V absolute maximum), and should be bypassed with at least 1 µF ceramic capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LR |
| Package | SOT-23-3L |
| Category | Power Management (PMIC) |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage accuracy (±2% of VOUT, formula only) | VOUT | -2 |  | 2 | % | VIN=VOUT+1V, IOUT=10mA | 4 |
| Input voltage | VIN |  |  | 6.5 | V | ISS=5uA | 4 |
| Enable voltage | VCE | 0.7 |  | 1.2 | V | VIN=2.2V, IOUT=1mA | 4 |
| Line regulation | ΔVOUT |  | 10 | 20 | mV | VOUT+1V≤VIN≤7V, IOUT=10mA | 4 |
| Load regulation | ΔVOUT |  | 20 | 40 | mV | VIN=VOUT+1V, 1mA≤IOUT≤100mA | 4 |
| Quiescent current | ISS |  | 6 | 8 | uA | VIN=VOUT+1V | 5 |
| Output voltage temperature coefficient | ΔVOUT/(ΔTa*VOUT) | -100 | 50 | 100 | ppm/℃ | VIN=VOUT(T)+1V, IOUT=10mA, -40℃≤Ta≤85℃ | 5 |
| Maximum input supply voltage | VIN |  |  | 9 | V |  | 4 |
| Maximum output current | IOUT |  |  | 450 | mA |  | 4 |
| Power dissipation (SOT23-3L) | PD |  |  | 250 | mW | SOT23-3L | 4 |
| Operating temperature | TOPR | -10 |  | 85 | ℃ |  | 4 |
| Storage temperature | TSTG | -40 |  | 125 | ℃ |  | 4 |
| ESD HBM | ESD(HBM) |  |  | 2000 | V |  | 4 |
| Thermal resistance junction to ambient (SOT23-3L) | θJA |  | 500 |  | °C/W | SOT23-3L | 7 |
| Maximum junction temperature (absolute limit) | TJ(MAX) |  |  | 150 | °C | Absolute maximum operating limit | 7 |
| Recommended maximum junction temperature | TJ |  |  | 125 | °C | Recommended for reliability in normal operation | 7 |
| Input capacitor | CIN | 1 |  | 10 | uF | Ceramic; placed close to LDO (layout guidance) | 9 |
| Output capacitor | COUT | 1 |  | 10 | uF | Ceramic; placed close to LDO (layout guidance) | 9 |

## CAD (KiCad official)

- Symbol: `LR6206A-T15`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files: `lr6206a-t15-etched.step` / `lr6206a-t15-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lr6206a-t15.step` / `lr6206a-t15.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LR datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590423129429475328) (11 pp, sha256 `d4e2069fc8f25ea9`, retrieved 2026-10-19, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lr6206a-t15-datasheet.pdf)