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LR432ATLT1G
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LRC Voltage Reference, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LR432ATLT1G
LRC · Voltage Reference · SOT-23
LR432ATLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | input | Reference input of the adjustable regulator; the internal approximately 1.24 V reference is sensed here, with reference input current typically 0.15 µA and at most 0.4 µA. |
| 2 | CATHODE | passive | Cathode (K) of the regulator; continuous cathode current is rated 100 mA, cathode voltage 20 V absolute maximum, and the output adjusts from VREF up to 18 V with a minimum cathode current for regulation of 55 µA. |
| 3 | ANODE | passive | Anode (A) terminal of the regulator, the common terminal of the shunt path against which the cathode voltage and the cathode current limits are specified. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Voltage (0.5% grade, LR432ATLT1G) | VREF | 1.234 | 1.24 | 1.246 | V | VKA=VREF, IKA=10mA | 2 |
| Deviation of Reference Voltage | 10 | mV | Test circuit 2 | 2 | |||
| Deviation of Reference Voltage Over-Temperature | VREF | 15 | mV | Test circuit 3 | 2 | ||
| Ratio of Change in VREF to Change in Cathode Voltage | VREF/VKA | -0.5 | -1.5 | mV/V | VKA: VREF to 16V | 2 | |
| Reference Input Current | IREF | 0.15 | 0.4 | µA | IKA=10mA, R1=10kΩ, R2=∞ | 2 | |
| Deviation of Reference Current Over Full Temperature Range | IREF | 0.1 | 0.4 | µA | IKA=10mA, R1=10kΩ, R2=∞, TA=-20 to 85°C | 2 | |
| Minimum Cathode Current for Regulation | IKA(MIN) | 55 | 80 | µA | VKA=VREF | 2 | |
| Off-State Cathode Current | IKA(OFF) | 0.04 | 0.5 | µA | VREF=0, VKA=18V | 2 | |
| Off-State Cathode Current | IKA(OFF) | 0.01 | 0.05 | µA | VKA=6V, VREF=0 | 2 | |
| Dynamic Impedance | ZKA | 0.05 | 0.15 | Ω | VKA=VREF, IKA=1 to 100mA, f≤1.0kHz | 2 | |
| Continuous cathode current range | IK | 100 | mA | 2 | |||
| Reference current range | IREF | 10 | mA | 2 | |||
| Cathode voltage | VKA | 20 | V | 2 | |||
| Operating Ambient Temperature | Topr | -40 | 125 | °C | 2 | ||
| Operating Junction Temperature Range | Tj | 150 | °C | 2 |
CAD (KiCad official)
- Symbol:
LR432ATLT1G - Footprint:
Package_TO_SOT_SMD:SOT-23 - 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files:
lr432atlt1g-etched.step/lr432atlt1g-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lr432atlt1g.step/lr432atlt1g.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LRC datasheet (11 pp, sha256
6b7235600199292b, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LR432ATLT1G
**LRC** · Voltage Reference · SOT-23
LR432ATLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | REF | input | Reference input of the adjustable regulator; the internal approximately 1.24 V reference is sensed here, with reference input current typically 0.15 µA and at most 0.4 µA. |
| 2 | CATHODE | passive | Cathode (K) of the regulator; continuous cathode current is rated 100 mA, cathode voltage 20 V absolute maximum, and the output adjusts from VREF up to 18 V with a minimum cathode current for regulation of 55 µA. |
| 3 | ANODE | passive | Anode (A) terminal of the regulator, the common terminal of the shunt path against which the cathode voltage and the cathode current limits are specified. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LRC |
| Package | SOT-23 |
| Category | Power Management (PMIC) |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Reference Voltage (0.5% grade, LR432ATLT1G) | VREF | 1.234 | 1.24 | 1.246 | V | VKA=VREF, IKA=10mA | 2 |
| Deviation of Reference Voltage | | | | 10 | mV | Test circuit 2 | 2 |
| Deviation of Reference Voltage Over-Temperature | VREF | | | 15 | mV | Test circuit 3 | 2 |
| Ratio of Change in VREF to Change in Cathode Voltage | VREF/VKA | | -0.5 | -1.5 | mV/V | VKA: VREF to 16V | 2 |
| Reference Input Current | IREF | | 0.15 | 0.4 | µA | IKA=10mA, R1=10kΩ, R2=∞ | 2 |
| Deviation of Reference Current Over Full Temperature Range | IREF | | 0.1 | 0.4 | µA | IKA=10mA, R1=10kΩ, R2=∞, TA=-20 to 85°C | 2 |
| Minimum Cathode Current for Regulation | IKA(MIN) | | 55 | 80 | µA | VKA=VREF | 2 |
| Off-State Cathode Current | IKA(OFF) | | 0.04 | 0.5 | µA | VREF=0, VKA=18V | 2 |
| Off-State Cathode Current | IKA(OFF) | | 0.01 | 0.05 | µA | VKA=6V, VREF=0 | 2 |
| Dynamic Impedance | ZKA | | 0.05 | 0.15 | Ω | VKA=VREF, IKA=1 to 100mA, f≤1.0kHz | 2 |
| Continuous cathode current range | IK | | | 100 | mA | | 2 |
| Reference current range | IREF | | | 10 | mA | | 2 |
| Cathode voltage | VKA | | | 20 | V | | 2 |
| Operating Ambient Temperature | Topr | -40 | | 125 | °C | | 2 |
| Operating Junction Temperature Range | Tj | | | 150 | °C | | 2 |
## CAD (KiCad official)
- Symbol: `LR432ATLT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-23`
- 3D model: SOT-23 (KiCad packages3D, STEP)
- 3D model files: `lr432atlt1g-etched.step` / `lr432atlt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lr432atlt1g.step` / `lr432atlt1g.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LRC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8589839387657220096) (11 pp, sha256 `6b7235600199292b`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lr432atlt1g-datasheet.pdf)