component

LR431APTLT1G

Public Made by Adom

by adom

LRC Voltage Reference, SOT-23. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs lr431aptlt1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
lr431aptlt1g-etched.fit.json lr431aptlt1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lr431aptlt1g-etched.glb lr431aptlt1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lr431aptlt1g-etched.step lr431aptlt1g: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
lr431aptlt1g.glb Publish 0.1.0 · Ray
lr431aptlt1g.kicad_mod Publish 0.1.0 · Ray
lr431aptlt1g.kicad_sym Publish 0.1.0 · Ray
lr431aptlt1g.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
lr431aptlt1g.step Publish 0.1.0 · Ray
package.json Publish 0.2.0 · Ray
pads.json pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
page.json lr431aptlt1g: specified limits as data (metadata.characteristics, 1 rows from the datasheet) · Ray
README.md lr431aptlt1g: specified limits as data (metadata.characteristics, 1 rows from the datasheet) · Ray

LR431APTLT1G

LRC · Voltage Reference · SOT-23

LR431APTLT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 REF input Reference input. High-impedance sense input to the internal 2.5 V bandgap comparator. Connect to the mid-point of the external R1/R2 divider between cathode and anode; VKA = Vref × (1 + R1/R2) + Iref × R1. Iref typ 1.5 µA (max 4 µA).
2 K passive Cathode. Regulated shunt terminal; sinks 1-100 mA in the stable/regulating region. Absolute max VKA = 36 V, cathode current range -100 to +150 mA. Dynamic impedance ~0.2 Ω (typ) at f ≤ 1 kHz.
3 A passive Anode. Common/return terminal of the shunt regulator; normally tied to circuit ground (or to the low side of the sensed rail).

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category PMIC
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • LR431APTLT1G

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Operating ambient temperature range TOPR -40 125 °C Classification table, LR431APTLT1G row range -40~+125 °C; Note 1: TMIN=-40 °C, TMAX=+125 °C 2

CAD (KiCad official)

  • Symbol: LR431APTLT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lr431aptlt1g-etched.step / lr431aptlt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr431aptlt1g.step / lr431aptlt1g.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
lr431aptlt1g.step 59 KB You want the bare part, or you mark your own boards.
lr431aptlt1g-etched.step 1.6 MB You want the part with LR431APTLT1G already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 417 faces against 69 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 3a6bd98799907b53, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF