Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

LR2105LT1G

LRC · ESD And Surge Protection (TVS/ESD) · SOT-23

LR2105LT1G from LRC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 I/O1 passive Protected line 1 (e.g. CAN bus line); steering diode to pin 3, reverse stand-off 24 V max, breakdown 26.2 V min at 5 mA, 30 pF max capacitance.
2 I/O2 passive Protected line 2 (e.g. CAN bus line); steering diode to pin 3, reverse stand-off 24 V max, breakdown 26.2 V min at 5 mA, 30 pF max capacitance.
3 COMMON passive Common pin of the dual diode array, shared by pins 1 and 2 (typically connected to ground), with ±30 kV IEC 61000-4-2 contact and air discharge rating.

Key specifications

Parameter Value
Manufacturer LRC
Package SOT-23
Category Circuit Protection
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Peak pulse power @ 8/20 µs PPP 350 W 8/20 µs 1
Peak pulse current @ 8/20 µs IPP 8 A 8/20 µs 1
IEC 61000-4-2 ESD contact discharge -30 30 kV IEC 61000-4-2 (ESD) contact 1
IEC 61000-4-2 ESD air discharge -30 30 kV IEC 61000-4-2 (ESD) air 1
Storage temperature range Tstg -55 150 ºC 1
Operating temperature range TJ -55 150 ºC 1
Reverse stand-off voltage (working peak reverse voltage) VRWM 24 V 2
Reverse leakage current IRM 200 nA VRWM = 24 V, Pin 1、2 to Pin 3; VRWM = 24 V, Pin 3 to Pin 1、2 2
Breakdown voltage VBR 26.2 V IT = 5 mA, Pin 1、2 to Pin 3; IT = 5 mA, Pin 3 to Pin 1、2 2
Junction capacitance CJ 30 pF VR = 0 V, f = 1 MHz 2

CAD (KiCad official)

  • Symbol: LR2105LT1G
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lr2105lt1g-etched.step / lr2105lt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lr2105lt1g.step / lr2105lt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LRC datasheet (5 pp, sha256 d1201756675d0733, retrieved 2026-10-21, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF