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LPM3413B3F

LOWPOWER · MOSFETs · SOT-23

LPM3413B3F from LOWPOWER, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the P-channel MOSFET; the datasheet gives a gate-source voltage limit of ±12 V as an absolute maximum rating but no pin-specific limit.
2 Source passive Source terminal of the P-channel MOSFET; the datasheet gives only the device-level absolute maximum ratings (VDS -20 V, VGS ±12 V) and no pin-specific limit.
3 Drain passive Drain terminal of the P-channel MOSFET; the device is rated for a drain-source voltage of -20 V and a continuous drain current of -3 A at TA=25°C (-2.0 A at TA=70°C).

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package SOT-23
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS -20 V 2
Gate-Source Voltage VGS -12 12 V 2
Continuous Drain Current ID -3 A TA=25°C 2
Continuous Drain Current ID -2 A TA=70°C 2
Pulsed Drain Current IDM -10 A 2
Power Dissipation PD 1.4 W TA=25°C 2
Power Dissipation PD 0.9 W TA=70°C 2
Junction and Storage Temperature Range TJ, TSTG -55 150 °C 2
Drain-Source Breakdown Voltage BVDSS -20 V ID=-250μA, VGS=0V 3
Zero Gate Voltage Drain Current IDSS -1 uA VDS=-20V,VGS=0V,TJ=25°C 3
Zero Gate Voltage Drain Current IDSS -5 uA TJ=55°C 3
Gate-Body leakage current IGSS -100 100 nA VDS=0V, VGS=±12V 3
Gate Threshold Voltage VGS(th) -0.3 -0.55 -1 V VDS=VGS, ID=-250μA 3
On state drain current ID(ON) -3 A VGS=-4.5V 3
Static Drain-Source On-Resistance RDS(ON) 81 95 mΩ VGS=-4.5V, ID=-3A 3
Static Drain-Source On-Resistance RDS(ON) 108 130 mΩ VGS=-2.5V, ID=-2.0A 3
Static Drain-Source On-Resistance RDS(ON) 146 190 mΩ VGS=-1.8V, ID=-1A 3
Diode Forward Voltage VSD -0.7 -1 V IS=1A,VGS=0V 3
Input Capacitance Ciss 500 540 660 pF VGS=0V, VDS=-10V, f=1MHz 3
Output Capacitance Coss 50 75 100 pF 3
Reverse Transfer Capacitance Crss 30 50 70 pF 3
Total Gate Charge Qg 4.8 6 7 nC VGS=-4.5V, VDS=-10V, ID=-3A 3
Gate Source Charge Qgs 1 1.3 1.6 nC 3
Gate Drain Charge Qgd 1 1.8 2.5 nC 3
Thermal resistance, Maximum Junction-to-Ambient RθJA 125 °C/W 2
Forward Trans-conductance gFS 10 S VGS=-4.5V, ID=-3A 3
Turn-On Delay Time tD(on) 10 nS VGS=-4.5V, VDS=-10V, RL=3.3Ω, RGEN=3Ω 3
Turn-On Rise Time tr 12.5 nS 3
Turn-Off Delay Time tD(off) 44 nS 3
Turn-Off Fall Time tf 22 nS 3
Body Diode Reverse Recovery Time trr 21 ns IF=-3A, dI/dt=100A/μs 3
Body Diode Reverse Recovery Charge Qrr 7.5 nC IF=-3A, dI/dt=100A/μs 3

CAD (KiCad official)

  • Symbol: LPM3413B3F
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: lpm3413b3f-etched.step / lpm3413b3f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lpm3413b3f.step / lpm3413b3f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (4 pp, sha256 d6f1e1af9a2ec208, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF