component
LPD3201
Public Made by Adomby adom
Suosemi DC-DC Converters, SOIC-8-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LPD3201
Suosemi · DC-DC Converters · SOIC-8-EP
LPD3201 from Suosemi, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vin | power_in | Power supply input pin with an operating voltage of DC 5V to 70V; absolute maximum input voltage is -0.3 to 70 V. |
| 2 | SW | output | Power output (switch node) pin; absolute maximum voltage is -0.3 V to Vin. |
| 3 | FB | input | Feedback pin with a feedback voltage of 1.25 V; absolute maximum voltage is -0.3 V to Vin. |
| 4 | EN | input | Enable pin: low enables the regulator and high disables it (EN threshold 1.6 V high, 0.8 V low), and a floating pin defaults to low. |
| 5 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 6 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 7 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 8 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Suosemi |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
CAD (KiCad official)
- Symbol:
LPD3201 - Footprint:
Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm - 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files:
lpd3201-etched.step/lpd3201-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lpd3201.step/lpd3201.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Suosemi datasheet (7 pp, sha256
61b69d742202f8bf, retrieved 2026-10-09, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LPD3201
**Suosemi** · DC-DC Converters · SOIC-8-EP
LPD3201 from Suosemi, in a SOIC-8-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Vin | power_in | Power supply input pin with an operating voltage of DC 5V to 70V; absolute maximum input voltage is -0.3 to 70 V. |
| 2 | SW | output | Power output (switch node) pin; absolute maximum voltage is -0.3 V to Vin. |
| 3 | FB | input | Feedback pin with a feedback voltage of 1.25 V; absolute maximum voltage is -0.3 V to Vin. |
| 4 | EN | input | Enable pin: low enables the regulator and high disables it (EN threshold 1.6 V high, 0.8 V low), and a floating pin defaults to low. |
| 5 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 6 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 7 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 8 | GND | power_in | Ground pin; PCB layout must be taken care of for this pin. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Suosemi |
| Package | SOIC-8-EP |
| Category | Power Management (PMIC) |
| Pins | 9 |
## CAD (KiCad official)
- Symbol: `LPD3201`
- Footprint: `Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.29x3mm`
- 3D model: SOIC-8-EP (KiCad packages3D, STEP)
- 3D model files: `lpd3201-etched.step` / `lpd3201-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lpd3201.step` / `lpd3201.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Suosemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586175354100715520) (7 pp, sha256 `61b69d742202f8bf`, retrieved 2026-10-09, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lpd3201-datasheet.pdf)