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LP873220RHDRQ1

Texas Instruments · DC-DC Converters · VQFN-28-EP(5x5)

LP873220RHDRQ1 from Texas Instruments, in a VQFN-28-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VOUT_LDO0 power_out Output of LDO0; leave the pin floating if LDO0 is not used.
2 FB_B0 input Positive output-voltage feedback (sense) input for Buck 0.
3 FB_B1 input Positive output-voltage feedback (sense) input for Buck 1.
4 AGND power_in Analog ground.
5 VANA power_in Supply voltage for analog and digital blocks; must be connected to the same node as VIN_Bx, with a recommended range of 2.8 V to 5.5 V.
6 EN input Programmable enable input for the regulators and GPOs; leave floating if not used, and the internal pull-down is enabled by default (EN_PD = 1).
7 VOUT_LDO1 power_out Output of LDO1; leave the pin floating if LDO1 is not used.
8 VIN_LDO1 power_in Power input for LDO1; connect to VANA if LDO1 is not used. Recommended range 2.5 V to 5.5 V.
9 nINT output Open-drain interrupt output, active low; connect to ground if not used.
10 CLKIN bidirectional External clock input, alternatively configurable as general-purpose digital output GPO2; leave floating if not used.
11 VIN_B1 power_in Input for Buck 1; VIN_Bx pins are not connected internally and must be tied together externally and locally bypassed.
12 VIN_B1 power_in Input for Buck 1; VIN_Bx pins are not connected internally and must be tied together externally and locally bypassed.
13 SW_B1 power_out Buck 1 switch node; leave floating if Buck 1 is not used.
14 SW_B1 power_out Buck 1 switch node; leave floating if Buck 1 is not used.
15 PGND_B1 power_in Power ground for Buck 1.
16 PGND_B1 power_in Power ground for Buck 1.
17 SCL input I2C serial clock input; connect a pull-up resistor, or connect to ground if the I2C interface is not used.
18 SDA bidirectional I2C serial data input/output; connect a pull-up resistor, or connect to ground if the I2C interface is not used.
19 SGND power_in Signal ground.
20 PGND_B0 power_in Power ground for Buck 0.
21 PGND_B0 power_in Power ground for Buck 0.
22 SW_B0 power_out Buck 0 switch node; leave floating if Buck 0 is not used.
23 SW_B0 power_out Buck 0 switch node; leave floating if Buck 0 is not used.
24 VIN_B0 power_in Input for Buck 0; VIN_Bx pins are not connected internally and must be tied together externally and locally bypassed.
25 VIN_B0 power_in Input for Buck 0; VIN_Bx pins are not connected internally and must be tied together externally and locally bypassed.
26 GPO output General-purpose digital output; leave floating if not used.
27 PGOOD output Power-good indication output; leave floating if not used.
28 VIN_LDO0 power_in Power input for LDO0; connect to VANA if LDO0 is not used. Recommended range 2.5 V to 5.5 V.
29 THERMAL PAD passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-28-EP(5x5)
Category Power Management (PMIC)
Pins 29

CAD (KiCad official)

  • Symbol: LP873220RHDRQ1
  • Footprint: Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm
  • 3D model: VQFN-28-EP(5x5) (KiCad packages3D, STEP)
  • 3D model files: lp873220rhdrq1-etched.step / lp873220rhdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp873220rhdrq1.step / lp873220rhdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (78 pp, sha256 27969d2a778a9013, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF