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LP6286QVF

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by adom

LOWPOWER DC-DC Converters, QFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LP6286QVF

LOWPOWER · DC-DC Converters · QFN-24-EP(4x4)

LP6286QVF from LOWPOWER, in a QFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OPP input Non-inverting input of the OPA (VCOM buffer) amplifier.
2 OPN input Inverting input of the OPA (VCOM buffer) amplifier.
3 OPO output Output of the OPA unity-gain VCOM buffer, rated for ±200 mA short-circuit current in unity gain.
4 OGND power_in Ground for the OPA; connect this pin to ground.
5 AVDD power_in Source driver VDD supply that also powers the charge pump and OPA; datasheet range is 6 V to 18 V with overvoltage protection at 18 V to 20 V.
6 DRVP output VGH charge-pump regulator driver output.
7 DRVN output VGL charge-pump regulator driver output.
8 VFLK input Timing-controller input for charging or discharging VGHM; datasheet input high minimum is 2 V and input low maximum is 0.5 V.
9 RST output Open-drain reset output, active low; pull-low voltage is 0.2 V max at 5 mA.
10 FBP input VGH charge-pump feedback input; connect a resistive divider from VGH to GND to set the output, with a feedback voltage of 1.23 V to 1.27 V.
11 FBN input VGL charge-pump feedback input; connect a resistive divider from VGL to REF to set the output, with a feedback voltage of 235 mV to 265 mV.
12 REF output Reference voltage output of 1.238 V to 1.262 V; connect a ceramic capacitor between REF and GND.
13 VIN power_in Supply input with a range of 2.5 V to 5.5 V; connect a ceramic capacitor between VIN and GND.
14 AGND power_in Analog ground.
15 VDET input Voltage detector input; connect a resistive divider from VIN to AGND, with a 1.25 V detecting voltage and 50 mV hysteresis.
16 COMP passive Compensation pin for the boost regulator error amplifier.
17 FB input Boost regulator feedback input; connect a resistive divider from the output to set the output voltage, with a feedback voltage of 1.238 V to 1.262 V.
18 PGND power_in Power ground for the boost regulator.
19 PGND power_in Power ground for the boost regulator.
20 LX passive Boost regulator switching node; connect the inductor and Schottky diode here, with a built-in N-MOSFET RDS(ON) of 200 mΩ and current limit of 2.5 A to 3 A.
21 DRN passive GPM discharge pin; connect a resistor between DRN and GND, with a DRN switch ON resistance of 30 Ω to 60 Ω.
22 VGHM output GPM output, with a VGHM discharge resistance of 1.5 kΩ to 3.5 kΩ.
23 VGH input GPM input connected to VGH; the datasheet lists VGH to GND absolute maximum as +36 V.
24 DLY passive VGHM delay discharge timing pin; connect a capacitor between DLY and GND, with a 4 µA to 6 µA source current and 1.22 V to 1.28 V threshold.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package QFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VIN Input Supply Voltage VIN 2.5 5.5 V 6
AVDD AVDD 6 18 V 6
AVDD Over Voltage Protect VOVP 18 20 V 6
Boost Switching Frequency FLX 1 1.2 1.4 MHz 6
Charge Pump Frequency FCP 500 600 700 kHz 6
VIN Supply Current IQ 0.4 0.8 mA VFB=1.5V, LX no Switching 6
VIN Supply Current IQ 2.3 5 mA VFB=1.2V, LX Switching 6
AVDD Operation Current IAVDD 1.2 3 mA VOPP=5V 6
Input UVLO Threshold VUVLO(VTH) 2.15 2.25 2.35 V VIN Rising 6
Reference Voltage VREF 1.238 1.25 1.262 V 6
Maximum Duty-Cycle DMAX 86 90 94 % 6
Feedback Voltage VFB 1.238 1.25 1.262 V 6
Current Limit ILimit 2.5 3 A 6
LX Leak Current ILeak 0.01 20 µA LX Off. 6
UVP Fault Protection Voltage VUVP 0.95 1 1.05 V VFB Falling 6
DLY Source Current IDLY 4 5 6 uA 7
DLY Threshold Voltage VDLY 1.22 1.25 1.28 V 7
VGH Switch ON Resistance RDS_GH 15 30 Ω VDLY=1.5V, VFLK = VIN 7
DRN Switch ON Resistor RDS_DRN 30 60 Ω VDLY=1.5V, VFLK = GND 7
VGHM Discharge Resistor RDS_VGHM 1.5 2.5 3.5 kΩ VDLY=1V 7
Positive Feedback Voltage VFBP 1.23 1.25 1.27 V 7
DRVP Switch ON Resistance RDS_DRVP1 3 20 Ω 7
Negative Feedback Voltage VFBN 235 250 265 mV 7
DRVN Switch ON Resistance RDS_DRVN1 3 20 Ω 7
Input Offset Voltage VOS 2 15 mV VOPO=VAVDD/2 7
Output Voltage Swing High VOH 5.03 5.06 V VOPP= VAVDD/2, ILoad = -50mA 7
Output Voltage Swing High VOH 9.85 9.92 V VOPP= VAVDD, ILoad = 5mA 7
Output Voltage Swing Low VOL 4.94 4.97 V VOPP= VAVDD/2, ILoad = 50mA 7
Output Voltage Swing Low VOL 0.08 0.15 V VOPP=0V, ILoad = -5mA 7
Short Circuit Current VOP_Short -200 200 mA Unity-Gain, VOPO= VAVDD/2 7
RST Blanking Time 140 160 180 ms 6
VIN, RST to GND -0.3 7 V 5
AVDD, LX to GND -0.3 20 V 5
VGH to GND -0.3 36 V 5
FB, FBP, FBN, DLY, VDET, RST, COMP, VFLK, REF -0.3 V max printed as (VIN + 0.3V) 5
OPP, OPN, OPP, DRVP, DRVN to GND -0.3 V max printed as (AVDD + 0.3V) 5
VGHM, VGH, DRN -0.3 30 V 5
Operating Junction Temperature Range TJ -40 150 °C 5
Operation Ambient Temperature Range -40 85 °C 5
Storage Temperature Range -65 150 °C 5
Maximum Soldering Temperature 260 °C at leads, 10sec 5
UVLO Threshold Hysteresis VUVLO(HYS) 100 mV Falling Hysteresis 6
Thermal Shutdown Threshold TSD 160 °C 6
Transconductance of Error Amplifier Gm 85 µA/V ΔICOMP=5uA 6
Voltage Gain AV 1500 V/V 6
Switch-ON Resistance RDS(ON) 200 mΩ 6
Internal Soft Start Time TSS 10 ms 6
UVP Fault Delay TUVP 55 ms 6
Short Circuit Protection Voltage VSCP 100 mV 6
Detecting Voltage Adjustment VDET 1.25 V HYS=50mV 6
DLY Discharge Resistor RDLY 10 Ω 7
VFLK Input High Voltage VFLK_H 2 V 7
VFLK Input Low Voltage VFLK_L 0.5 V 7
Propagation Delay VFLY to VGHM TPP 200 ns VGH = 30V 7
RST Pull Low Voltage VRST 0.2 V IRST=5mA 6
Slew Rate SR 40 V/us VOPP = 2V to 8V, 8V to 2V, 20% to 80% 7
Thermal Resistance, junction to ambient (QFN-24 4x4) θJA 78 °C/W QFN-24 4x4 5
Thermal Resistance, junction to case (QFN-24 4x4) θJC 25 °C/W QFN-24 4x4 5

CAD (KiCad official)

  • Symbol: LP6286QVF
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: QFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: lp6286qvf-etched.step / lp6286qvf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp6286qvf.step / lp6286qvf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (8 pp, sha256 60fb1b7b5087b048, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF