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LP6261B6F
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LOWPOWER DC-DC Converters, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP6261B6F
LOWPOWER · DC-DC Converters · SOT-23-6
LP6261B6F from LOWPOWER, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Voltage output pin of the boost converter; the datasheet gives VOUT to GND as an absolute maximum of 8V. |
| 2 | GND | power_in | Ground pin; the datasheet gives VIN and EN to GND, VOUT to GND and SW to GND absolute maximum ratings of 6.5V, 8V and 10V respectively. |
| 3 | EN | input | Chip enable: logic high enables the device and logic low disables it, with EN input low at 0.3V max and high at 1.4V min, and it must not be left floating. |
| 4 | VIN | power_in | Voltage supply input pin; VIN to GND absolute maximum is 6.5V. |
| 5 | NC | unconnected | No connect on the LP6261 (B6F, fixed 5.1V) variant; this pin is the FB feedback pin (feedback voltage 1.36V) only on the LP6261A (AB6F) variant. |
| 6 | SW | output | Switching pin of the boost converter; SW to GND absolute maximum is 10V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage LP6261B6F | 5 | 5.1 | 5.2 | V | 4 | ||
| Supply Voltage | 1 | 5 | V | 4 | |||
| Supply Current (Shutdown) | 0.05 | 1 | uA | VEN=0V, VIN=5V | 4 | ||
| Input UVLO | 0.8 | V | IOUT=1mA | 4 | |||
| Supply Current | 1 | uA | VEN=High, VIN=5V, No load | 4 | |||
| Switching Frequency | 1200 | KHz | 4 | ||||
| EN Input Low Voltage | 0.3 | V | 4 | ||||
| EN Input High Voltage | 1.4 | V | 4 | ||||
| EN Input Current | 0.1 | uA | VEN=5V | 4 | |||
| Low-side Current Limit | 1 | A | VIN=3.5V | 4 | |||
| Start-up Current Limit | 1 | A | 4 | ||||
| High-side On Resistance | 160 | mΩ | IDS=-100mA | 4 | |||
| Low-side On Resistance | 220 | mΩ | IDS=100mA | 4 | |||
| Thermal Shutdown | 150 | ℃ | 4 | ||||
| Thermal Shutdown Hysteresis | 25 | ℃ | 4 | ||||
| VIN and EN to GND | 6.5 | V | 3 | ||||
| VOUT to GND | 8 | V | 3 | ||||
| SW to GND | 10 | V | 3 | ||||
| Maximum Junction Temperature | 150 | °C | 3 | ||||
| Operating Ambient Temperature Range (TA) | TA | -40 | 85 | ℃ | 3 | ||
| Maximum Soldering Temperature | 260 | °C | at leads, 10 sec | 3 | |||
| ESD HBM (Human Body Model) | 2 | KV | 3 | ||||
| ESD MM (Machine Model) | 200 | V | 3 | ||||
| Maximum Power Dissipation (SOT23-6) | PD | 0.45 | W | SOT23-6, TA=25℃ | 3 | ||
| Thermal Resistance (SOT23-6) | JA | 250 | ℃/W | SOT23-6 | 3 |
CAD (KiCad official)
- Symbol:
LP6261B6F - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
lp6261b6f-etched.step/lp6261b6f-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp6261b6f.step/lp6261b6f.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (7 pp, sha256
1d622aaf0aeb09f6, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP6261B6F
**LOWPOWER** · DC-DC Converters · SOT-23-6
LP6261B6F from LOWPOWER, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Voltage output pin of the boost converter; the datasheet gives VOUT to GND as an absolute maximum of 8V. |
| 2 | GND | power_in | Ground pin; the datasheet gives VIN and EN to GND, VOUT to GND and SW to GND absolute maximum ratings of 6.5V, 8V and 10V respectively. |
| 3 | EN | input | Chip enable: logic high enables the device and logic low disables it, with EN input low at 0.3V max and high at 1.4V min, and it must not be left floating. |
| 4 | VIN | power_in | Voltage supply input pin; VIN to GND absolute maximum is 6.5V. |
| 5 | NC | unconnected | No connect on the LP6261 (B6F, fixed 5.1V) variant; this pin is the FB feedback pin (feedback voltage 1.36V) only on the LP6261A (AB6F) variant. |
| 6 | SW | output | Switching pin of the boost converter; SW to GND absolute maximum is 10V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output Voltage LP6261B6F | | 5 | 5.1 | 5.2 | V | | 4 |
| Supply Voltage | | 1 | | 5 | V | | 4 |
| Supply Current (Shutdown) | | | 0.05 | 1 | uA | VEN=0V, VIN=5V | 4 |
| Input UVLO | | | 0.8 | | V | IOUT=1mA | 4 |
| Supply Current | | | 1 | | uA | VEN=High, VIN=5V, No load | 4 |
| Switching Frequency | | | 1200 | | KHz | | 4 |
| EN Input Low Voltage | | | 0.3 | | V | | 4 |
| EN Input High Voltage | | | 1.4 | | V | | 4 |
| EN Input Current | | | 0.1 | | uA | VEN=5V | 4 |
| Low-side Current Limit | | | 1 | | A | VIN=3.5V | 4 |
| Start-up Current Limit | | | 1 | | A | | 4 |
| High-side On Resistance | | | 160 | | mΩ | IDS=-100mA | 4 |
| Low-side On Resistance | | | 220 | | mΩ | IDS=100mA | 4 |
| Thermal Shutdown | | | 150 | | ℃ | | 4 |
| Thermal Shutdown Hysteresis | | | 25 | | ℃ | | 4 |
| VIN and EN to GND | | | | 6.5 | V | | 3 |
| VOUT to GND | | | | 8 | V | | 3 |
| SW to GND | | | | 10 | V | | 3 |
| Maximum Junction Temperature | | | | 150 | °C | | 3 |
| Operating Ambient Temperature Range (TA) | TA | -40 | | 85 | ℃ | | 3 |
| Maximum Soldering Temperature | | | | 260 | °C | at leads, 10 sec | 3 |
| ESD HBM (Human Body Model) | | | | 2 | KV | | 3 |
| ESD MM (Machine Model) | | | | 200 | V | | 3 |
| Maximum Power Dissipation (SOT23-6) | PD | | | 0.45 | W | SOT23-6, TA=25℃ | 3 |
| Thermal Resistance (SOT23-6) | JA | | 250 | | ℃/W | SOT23-6 | 3 |
## CAD (KiCad official)
- Symbol: `LP6261B6F`
- Footprint: `Package_TO_SOT_SMD:SOT-23-6`
- 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files: `lp6261b6f-etched.step` / `lp6261b6f-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp6261b6f.step` / `lp6261b6f.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LOWPOWER datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588885006084792320) (7 pp, sha256 `1d622aaf0aeb09f6`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp6261b6f-datasheet.pdf)