component
LP5912Q1.5DRVTQ1
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, WSON-6-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP5912Q1.5DRVTQ1
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
LP5912Q1.5DRVTQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated 1.5 V output supplying 1 mA to 500 mA load current with ±3% tolerance. |
| 2 | NC | unconnected | No internal connection; may be left open or connected to ground. |
| 3 | PG | output | Open-drain power-good indicator output low when VOUT < 1.35 V (90% nominal) and high-impedance when VOUT > 1.41 V (94% nominal) with 140 µs typical delay; requires external pullup. |
| 4 | EN | input | Enable input with 3 MΩ internal pulldown; logic high (≥1.3 V) enables regulator output, logic low (≤0.3 V) disables output and activates auto-discharge. |
| 5 | GND | power_in | Ground reference providing return path for all device currents. |
| 6 | IN | power_in | Unregulated input supply voltage operating range 1.6 V to 6.5 V; minimum 1.6 V required for proper regulation. |
| 7 | Thermal Pad | passive | Exposed thermal pad soldered to PCB copper area with thermal vias to ground plane for heat dissipation; connect to ground or leave floating, do not connect to other potentials. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
LP5912Q1.5DRVTQ1 - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
lp5912q1-5drvtq1-etched.step/lp5912q1-5drvtq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp5912q1-5drvtq1.step/lp5912q1-5drvtq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
34118b388e5edb0e, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP5912Q1.5DRVTQ1
**Texas Instruments** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · WSON-6-EP(2x2)
LP5912Q1.5DRVTQ1 from Texas Instruments, in a WSON-6-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Regulated 1.5 V output supplying 1 mA to 500 mA load current with ±3% tolerance. |
| 2 | NC | unconnected | No internal connection; may be left open or connected to ground. |
| 3 | PG | output | Open-drain power-good indicator output low when VOUT < 1.35 V (90% nominal) and high-impedance when VOUT > 1.41 V (94% nominal) with 140 µs typical delay; requires external pullup. |
| 4 | EN | input | Enable input with 3 MΩ internal pulldown; logic high (≥1.3 V) enables regulator output, logic low (≤0.3 V) disables output and activates auto-discharge. |
| 5 | GND | power_in | Ground reference providing return path for all device currents. |
| 6 | IN | power_in | Unregulated input supply voltage operating range 1.6 V to 6.5 V; minimum 1.6 V required for proper regulation. |
| 7 | Thermal Pad | passive | Exposed thermal pad soldered to PCB copper area with thermal vias to ground plane for heat dissipation; connect to ground or leave floating, do not connect to other potentials. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 7 |
## CAD (KiCad official)
- Symbol: `LP5912Q1.5DRVTQ1`
- Footprint: `Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm`
- 3D model: WSON-6-EP(2x2) (KiCad packages3D, STEP)
- 3D model files: `lp5912q1-5drvtq1-etched.step` / `lp5912q1-5drvtq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp5912q1-5drvtq1.step` / `lp5912q1-5drvtq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/lp5912-q1) (35 pp, sha256 `34118b388e5edb0e`, retrieved 2026-09-27, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp5912q1-5drvtq1-datasheet.pdf)