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LP5907QMFX-1.2Q1

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LP5907QMFX-1.2Q1 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Input voltage supply; connect a 1-µF capacitor at this input.
2 GND power_in Common ground.
3 EN input Enable input: a low voltage (< VIL) turns the regulator off and discharges the output to GND through an internal 230-Ω pulldown, a high voltage (> VIH) enables the regulator output, and an internal 1-MΩ pulldown holds the regulator off by default.
4 N/C unconnected No internal electrical connection.
5 OUT power_out Regulated output voltage; connect a minimum 1-µF low-ESR capacitor to this pin, and an internal 230-Ω (typical) pulldown prevents charge remaining on VOUT in shutdown.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Output voltage tolerance ΔVOUT -3 3 %VOUT SOT-23, VOUT < 1.8 V, VIN = (VOUT(NOM)+1 V) to 5.5 V, IOUT = 1 mA to 250 mA 6
Input supply voltage VIN 2.2 5.5 V 5
Enable input voltage VEN 0 5.5 V 5
Output current IOUT 0 250 mA 5
Operating junction temperature TJ-MAX-OP -40 125 °C 5
Input voltage VIN -0.3 6 V 5
Output voltage VOUT -0.3 V See (3): VIN + 0.3 V or 6 V, whichever is less 5
Enable input voltage VEN -0.3 6 V 5
Junction temperature TJMAX 150 °C 5
Storage temperature Tstg -65 150 °C 5
Junction-to-ambient thermal resistance RθJA 186.9 °C/W DBV (SOT-23) 5-pin package 5
Junction-to-case (top) thermal resistance RθJC(top) 112.3 °C/W DBV (SOT-23) 5-pin package 5
Junction-to-board thermal resistance RθJB 52.3 °C/W DBV (SOT-23) 5-pin package 5
Junction-to-top characterization parameter ψJT 27.5 °C/W DBV (SOT-23) 5-pin package 5
Junction-to-board characterization parameter ψJB 51.8 °C/W DBV (SOT-23) 5-pin package 5
Input voltage VIN 2.2 5.5 V TA = 25°C 6
Output load current ILOAD 0 250 mA 6
Quiescent current IQ 12 25 µA VEN = 1.2 V, IOUT = 0 mA 6
Quiescent current IQ 250 425 µA VEN = 1.2 V, IOUT = 250 mA 6
Quiescent current disabled IQ 0.2 1 µA VEN = 0.3 V (Disabled) 6
Ground current IG 14 µA VEN = 1.2 V, IOUT = 0 mA 6
Dropout voltage VDO 50 mV IOUT = 100 mA 6
Dropout voltage VDO 250 mV IOUT = 250 mA 6
Short-circuit current limit ISC 250 500 mA TA = 25°C 6
Power-supply rejection ratio PSRR 82 dB f = 1 kHz, IOUT = 20 mA 6
Output noise voltage eN 6.5 µVRMS BW = 10 Hz to 100 kHz, IOUT = 250 mA 6
Output noise voltage eN 10 µVRMS BW = 10 Hz to 100 kHz, IOUT = 1 mA 6
Output automatic discharge pulldown resistance RAD 230 Ω VEN < VIL (output disabled) 6
Thermal shutdown TSD 160 °C TJ rising 6
Thermal hysteresis TSD 15 °C TJ falling from shutdown 6
Low input threshold VIL 0.4 V VIN = 2.2 V to 5.5 V, VEN falling until the output is disabled 6
High input threshold VIH 1.2 V VIN = 2.2 V to 5.5 V, VEN rising until the output is enabled 6
Input current at EN pin IEN 5.5 µA VEN = 5.5 V and VIN = 5.5 V 6
Input current at EN pin IEN 0.001 µA VEN = 0 V and VIN = 5.5 V 6
Line transient ΔVOUT -1 1 mV VIN = (VOUT(NOM)+1 V) to (VOUT(NOM)+1.6 V) in 30 µs 7
Load transient ΔVOUT -40 40 mV IOUT = 1 mA to 250 mA in 10 µs 7
Overshoot on start-up 5 % Stated as a percentage of VOUT(NOM) 7
Turnon time tON 80 150 µs From VEN > VIH to VOUT = 95% of VOUT(NOM), TA = 25°C 7
Input capacitance CIN 0.7 1 µF Capacitance for stability 7
Output capacitance COUT 0.7 1 10 µF Capacitance for stability 7
Output/input capacitor ESR ESR 5 500 mΩ 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper ground pin using as wide and short copper traces as are practical. 19

CAD (KiCad official)

  • Symbol: LP5907QMFX-1.2Q1
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lp5907qmfx-1-2q1-etched.step / lp5907qmfx-1-2q1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp5907qmfx-1-2q1.step / lp5907qmfx-1-2q1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 9de43625b4950da2, retrieved 2026-11-05, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF