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LP5860MRKPR

Texas Instruments · LED Drivers · VQFN-40(5x5)

LP5860MRKPR from Texas Instruments, in a VQFN-40(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CS0 tri_state Current sink 0 output; if not used, this pin must be left floating.
2 CS1 tri_state Current sink 1 output; if not used, this pin must be left floating.
3 CS2 tri_state Current sink 2 output; if not used, this pin must be left floating.
4 CS3 tri_state Current sink 3 output; if not used, this pin must be left floating.
5 CS4 tri_state Current sink 4 output; if not used, this pin must be left floating.
6 CS5 tri_state Current sink 5 output; if not used, this pin must be left floating.
7 CS6 tri_state Current sink 6 output; if not used, this pin must be left floating.
8 CS7 tri_state Current sink 7 output; if not used, this pin must be left floating.
9 CS8 tri_state Current sink 8 output; if not used, this pin must be left floating.
10 SW0 tri_state High-side PMOS switch output for scan line 0; if not used, this pin must be left floating.
11 SW1 tri_state High-side PMOS switch output for scan line 1; if not used, this pin must be left floating.
12 SW2 tri_state High-side PMOS switch output for scan line 2; if not used, this pin must be left floating.
13 SW3 tri_state High-side PMOS switch output for scan line 3; if not used, this pin must be left floating.
14 SW4 tri_state High-side PMOS switch output for scan line 4; if not used, this pin must be left floating.
15 SW5 tri_state High-side PMOS switch output for scan line 5; if not used, this pin must be left floating.
16 VLED power_in Power input for high-side switches; operating range 2.7V to 5.5V.
17 SW6 tri_state High-side PMOS switch output for scan line 6; if not used, this pin must be left floating.
18 SW7 tri_state High-side PMOS switch output for scan line 7; if not used, this pin must be left floating.
19 SW8 tri_state High-side PMOS switch output for scan line 8; if not used, this pin must be left floating.
20 SW9 tri_state High-side PMOS switch output for scan line 9; if not used, this pin must be left floating.
21 SW10 tri_state High-side PMOS switch output for scan line 10; if not used, this pin must be left floating.
22 CS9 tri_state Current sink 9 output; if not used, this pin must be left floating.
23 CS10 tri_state Current sink 10 output; if not used, this pin must be left floating.
24 CS11 tri_state Current sink 11 output; if not used, this pin must be left floating.
25 CS12 tri_state Current sink 12 output; if not used, this pin must be left floating.
26 CS13 tri_state Current sink 13 output; if not used, this pin must be left floating.
27 CS14 tri_state Current sink 14 output; if not used, this pin must be left floating.
28 CS15 tri_state Current sink 15 output; if not used, this pin must be left floating.
29 CS16 tri_state Current sink 16 output; if not used, this pin must be left floating.
30 CS17 tri_state Current sink 17 output; if not used, this pin must be left floating.
31 AGND power_in Analog ground; must be connected to exposed thermal pad and common ground plane.
32 VCAP power_out Internal LDO output; connect 1-μF capacitor between this pin and GND as close to device as possible.
33 IFS input Interface type select; I2C is selected when low, SPI is selected when high; resistor must be connected between VIO and this pin.
34 VSYNC input External synchronize signal for display mode 2 and mode 3.
35 SCL_SCLK input I2C clock input or SPI clock input; pull up to VIO when configured as I2C.
36 SDA_MOSI bidirectional I2C data input or SPI leader output follower input; pull up to VIO when configured as I2C.
37 ADDR0_MISO bidirectional I2C address select 0 or SPI leader input follower output.
38 ADDR1_SS input I2C address select 1 or SPI follower select.
39 VIO_EN power_in Power supply for digital circuits and chip enable input; connect 1-nF capacitor between this pin and GND as close to device as possible.
40 VCC power_in Power supply for device; connect 1-μF capacitor between this pin and GND; operating range 2.7V to 5.5V.
41 GND passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-40(5x5)
Category LED Drivers
Pins 41

CAD (KiCad official)

  • Symbol: LP5860MRKPR
  • Footprint: Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm
  • 3D model: VQFN-40(5x5) (KiCad packages3D, STEP)
  • 3D model files: lp5860mrkpr-etched.step / lp5860mrkpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp5860mrkpr.step / lp5860mrkpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (56 pp, sha256 e657303a8bf68776, retrieved 2026-10-07, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF