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README

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LP5569RTWR

Texas Instruments · LED Drivers · WQFN-24-EP(4x4)

LP5569RTWR from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 C2+ passive Positive pin of charge-pump flying capacitor 2. If charge pump is not used, this pin must be left floating.
2 C1+ passive Positive pin of charge-pump flying capacitor 1. If charge pump is not used, this pin must be left floating.
3 VIN power_in Input power, a 1-µF capacitor must be connected between PGND and this pin; the recommended input voltage range is 2.5 V to 5.5 V.
4 AGND power_in Analog and digital ground. Connect to PGND, exposed thermal pad, and common ground plane.
5 EN/PWM input Chip enable and PWM input pin; the PWM input uses logic-level thresholds with VIH_MIN = 1.25 V and VIL_MAX = 0.4 V.
6 CLK bidirectional Clock input/output; by default a clock input, and if not used it must be connected to GND or VIN.
7 GPIO/TRIG/INT bidirectional General-purpose input or open-drain output, or trigger input or open-drain output, or interrupt open-drain output, configured in the I2C registers; it can be left floating if not used.
8 SDA bidirectional I2C bus data line (open-drain); if not used, it must be connected to GND or VIN.
9 SCL input I2C bus clock line; if not used, it must be connected to GND or VIN.
10 V1P8 power_in Input power for digital circuitry; the recommended input voltage range is 1.65 V to 1.95 V.
11 LED8 output LED current sink 8; if not used, this pin can be left floating.
12 LED7 output LED current sink 7; if not used, this pin can be left floating.
13 LED6 output LED current sink 6; if not used, this pin can be left floating.
14 LED5 output LED current sink 5; if not used, this pin can be left floating.
15 LED4 output LED current sink 4; if not used, this pin can be left floating.
16 LED3 output LED current sink 3; if not used, this pin can be left floating.
17 LED2 output LED current sink 2; if not used, this pin can be left floating.
18 LED1 output LED current sink 1; if not used, this pin can be left floating.
19 LED0 output LED current sink 0; if not used, this pin can be left floating.
20 ADDR input I2C slave-address selection pin; this pin must not be left floating.
21 PGND power_in Charge-pump power ground. Connect to AGND, exposed thermal pad, and common ground plane.
22 VOUT power_out Charge-pump output voltage; if the charge pump is used, a 1-µF capacitor must be connected between PGND and this pin.
23 C2- passive Negative pin of charge-pump flying capacitor 2. If charge pump is not used, this pin must be left floating.
24 C1- passive Negative pin of charge-pump flying capacitor 1. If charge pump is not used, this pin must be left floating.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-24-EP(4x4)
Category LED Drivers
Pins 25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage on VIN 2.5 5.5 V 5
Voltage on LED0 to LED8, C1-, C2-, C1+, C2+, VOUT 0 V 5
Voltage on CLK, ADDR, EN/PWM, GPIO/TRIG/INT, SDA, SCL 0 V 5
Input voltage on V1P8 1.65 1.95 V 5
Output current on VOUT 0 160 mA 5
Operating ambient temperature TA -40 85 °C 5
Voltage on VIN, CLK, ADDR, EN/PWM, GPIO/TRIG/INT, SCL, SDA, VOUT -0.3 6 V 5
Voltage on LED0 to LED8, C1-, C2-, C1+, C2+ -0.3 V 5
Voltage on V1P8 -0.3 2 V 5
Junction temperature TJ-MAX -40 125 °C 5
Storage temperature Tstg -65 150 °C 5
Human-body model (HBM) ESD rating V(ESD) -2500 2500 V per ANSI/ESDA/JEDEC JS-001 5
Charged-device model (CDM) ESD rating V(ESD) -250 250 V per JEDEC JESD22-C101 5
Standby supply current IVIN 0.2 1 µA VEN/PWM = 0 V, chip_en (bit) = 0 6
Standby supply current IVIN 1 2 µA VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK not running 6
Standby supply current IVIN 2 4 µA VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK running 6
Normal-mode supply current IVIN 56 70 µA External CLK running, charge pump and current sinks disabled 6
Normal-mode supply current (charge pump 1× mode) IVIN 65 90 µA Charge pump in 1× mode, no load, current sinks disabled 6
Power-save mode supply current IVIN 10 15 µA External CLK running, see Automatic Power-Save Mode 6
Power-save mode supply current (internal oscillator) IVIN 10 15 µA Internal oscillator running 6
Standby supply current IV1P8 0.2 2 µA VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK not running 6
Standby supply current IV1P8 1 4 µA VEN/PWM = 3.3 V, chip_en (bit) = 0, external CLK running 6
Normal-mode supply current IV1P8 174 190 µA External CLK running, charge pump and current sinks disabled 6
Normal-mode supply current (charge pump 1× mode) IV1P8 174 190 µA Charge pump in 1× mode, no load, current sinks disabled 6
Powersave-mode supply current IV1P8 1 5 µA External CLK running 6
Powersave-mode supply current (internal oscillator) IV1P8 1 5 µA Internal oscillator running 6
32-kHz internal oscillator frequency accuracy ƒOSC -10 10 % TA = 25°C 6
10-MHz internal oscillator frequency accuracy ƒOSC -7 7 % 6
Charge-pump output voltage VOUT 4.41 4.5 4.59 V VVIN = 3.7 V, IOUT = 160 mA, gain = 1.5× 6
Maximum sink current IMAX 24.5 25.5 26.5 mA 7
Sink current accuracy ILED_ACC -4.5 4.5 % Current set to 17.5 mA. PWM = 100% 7
Matching ILED_MATCH 1 2.5 % Current set to 17.5 mA 7
Saturation voltage VSAT 90 110 mV Output current set to 25.5 mA 7
Input low level (EN/PWM, SCL, ADDR) VIL 0.4 V 7
Input high level (EN/PWM, SCL, ADDR) VIH 1.25 V 7
Input leakage current (EN/PWM, SCL, ADDR) Ilkg -1 1 µA VI ≤ VVIN 7
Input low level (SDA, GPIO/TRIG/INT, CLK) VIL 0.4 V Pin configured as input 7
Input high level (SDA, GPIO/TRIG/INT, CLK) VIH 1.25 V Pin configured as input 7
Input leakage current (SDA, GPIO/TRIG/INT, CLK) Ilkg -1 1 µA Pin configured as input, VVIN = 5.5 V, VI ≤ VVIN 7
Output low level (SDA, GPIO/TRIG/INT, CLK) VOL 0.2 0.5 V IPULLUP = 3 mA 7
Enable time, EN/PWM first rising edge until first I2C access tEN 2 3 ms 7
Clock frequency (I2C fast mode) ƒSCL 0 400 kHz I2C fast mode 8
Hold time (repeated) START condition 0.6 µs I2C fast mode 8
Clock low time 1.3 µs I2C fast mode 8
Clock high time 600 ns I2C fast mode 8
Setup time for a repeated START condition 600 ns I2C fast mode 8
Data hold time 0 ns I2C fast mode 8
Data setup time 100 ns I2C fast mode 8
Rise time of SDA and SCL 300 ns I2C fast mode 8
Fall time of SDA and SCL 300 ns I2C fast mode 8
Setup time for STOP condition 600 ns I2C fast mode 8
Bus-free time between a STOP and a START condition 1.3 µs I2C fast mode 8
Capacitive load for each bus line Cb 10 200 pF I2C fast mode 8
High time tCLKH 6 µs 8
Low time tCLKL 6 µs 8
Clock rise time, 10% to 90% tr 2 µs 8
Clock fall time, 90% to 10% tf 2 µs 8
Undervoltage lockout, VVIN falling VUVLO 2.2 V VVIN falling 6
Junction-to-ambient thermal resistance RθJA 35.8 °C/W 5

CAD (KiCad official)

  • Symbol: LP5569RTWR
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: lp5569rtwr-etched.step / lp5569rtwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp5569rtwr.step / lp5569rtwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (93 pp, sha256 ebce5fc0c509be9a, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF