component
LP5305QVF
Public Made by Adomby adom
LOWPOWER Supervisor And Reset ICs, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownLP5305QVF
LOWPOWER · Supervisor And Reset ICs · DFN-8-EP(2x2)
LP5305QVF from LOWPOWER, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VIN | power_in | Power source input with a 3.3V to 5V recommended range and a 30V absolute maximum to GND; connect a ceramic capacitor between VIN and GND. |
| 2 | GND | power_in | Ground reference for the device; the datasheet recommends one uninterrupted ground plane connecting power and analog ground. |
| 3 | NC | unconnected | No connect pin, not internally used by the device. |
| 4 | Fault | output | Open-drain fault output that goes low on input OVP, output over-current, battery OVP or over-temperature; FAULT low sink of 5mA gives 0.2V max and high-level leakage is 10uA max at 5V. |
| 5 | EN | input | Enable pin with 1.4V (VENH) high and 0.4V (VENL) low thresholds; it has an internal pull-down so it may float, and driving it high turns the power switch off. |
| 6 | BAT | input | Battery voltage detector input; battery overvoltage threshold is 4.35V typ. with 0.275V hysteresis and 200us blanking at VIN=5V. |
| 7 | ISET | passive | Over-current limit setting pin; connect an external RSET resistor to GND (15kΩ to 90kΩ recommended), with IOCP = 25000 / RSET. |
| 8 | VOUT | output | Output through the internal power MOSFET, with an absolute maximum rating of -0.3V to +7V to GND and output short-circuit protection. |
| 9 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | DFN-8-EP(2x2) |
| Category | Power Management (PMIC) |
| Pins | 9 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Power Source Voltage | VIN | 3.3 | 5 | 26 | V | TJ= +25 °C | 5 |
| Input UVLO Threshold | VUVLO | 2.5 | 2.7 | 2.9 | V | VIN Rising | 5 |
| Switch On Resistance | RDS(ON) | 160 | 250 | mΩ | IOUT=1A | 5 | |
| Input Voltage | VIN | 3.3 | 5 | V | 4 | ||
| Output Current | IOUT | 0.3 | 1.5 | A | 4 | ||
| OCP Set Resistance | RSET | 15 | 90 | kΩ | 4 | ||
| Junction Temperature | TJ | -40 | 125 | °C | 4 | ||
| VIN to GND | VIN | -0.3 | 30 | V | 4 | ||
| VOUT to GND | VOUT | -0.3 | 7 | V | 4 | ||
| All Other Pin to GND | -0.3 | 7 | V | 4 | |||
| Operating Junction Temperature Range | TJ | -40 | 150 | °C | 4 | ||
| Operation Ambient Temperature Range | -40 | 105 | °C | 4 | |||
| Storage Temperature Range | -65 | 150 | °C | 4 | |||
| Maximum Soldering Temperature | 260 | °C | at leads, 10sec | 4 | |||
| UVLO Threshold Hysteresis | ΔVUVLO | 200 | mV | Falling Hysteresis | 5 | ||
| Power On Deglitch Time | TDeglitch | 8 | ms | 5 | |||
| Soft Start Time | TSS | 8.2 | ms | 5 | |||
| Power Source Current | IIN | 400 | µA | VIN=5V, EN=L | 5 | ||
| Shutdown Current | ISD | 55 | uA | VIN=5V, EN=H | 5 | ||
| Thermal Shutdown Threshold | TSD | 140 | °C | 5 | |||
| Thermal Shutdown Threshold Hysteresis | ΔTSD | 20 | °C | 5 | |||
| EN Threshold Voltage (high) | VENH | 1.4 | V | 5 | |||
| EN Threshold Voltage (low) | VENL | 0.4 | V | 5 | |||
| EN Input Resistance to GND | IEN | 15 | uA | EN=2V | 5 | ||
| FAULT Output Logic Low | 0.2 | V | Sink 5mA | 5 | |||
| FAULT Logic High Leakage Current | 10 | uA | Fault=5V | 5 | |||
| Output Voltage Regulation | VLDO | 5.5 | V | VIN=5.7V | 5 | ||
| Input Over Voltage Protect threshold | VIOVP | 5.85 | V | VIN from 5V to 10V | 5 | ||
| Input OVP threshold Hysteresis | ΔVIOVP | 100 | mV | VIN from 10V to 5V | 5 | ||
| Input OVP Recovery Delay Time | TOVPR | 8.2 | ms | 5 | |||
| Over Current Protection | IOCP | 1 | A | RSET = 24.9K, 3.3V<VIN<VIOVP | 5 | ||
| OCP Blanking Time | TOCP | 200 | us | 5 | |||
| Over Current Recover Delay | TOCR | 65 | ms | 5 | |||
| Battery Voltage OVP | VBOVP | 4.35 | V | VIN=5V | 5 | ||
| Battery OVP Hysteresis | ΔVBOVP | 0.275 | V | VIN=5V | 5 | ||
| Battery OVP Blanking Time | TBOVP | 200 | us | VIN=5V | 5 | ||
| BAT Pin Leakage Current | IBAT | 10 | nA | VIN=5V, VBAT=4.4V | 5 | ||
| Thermal Resistance DFN-8 junction-to-ambient | θJA | 76.11 | °C/W | DFN-8 | 4 |
CAD (KiCad official)
- Symbol:
LP5305QVF - Footprint:
Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm - 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
- 3D model files:
lp5305qvf-etched.step/lp5305qvf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp5305qvf.step/lp5305qvf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (8 pp, sha256
436562b21bb3d69c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).