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LP5305AQVF

Public Made by Adom

by adom

LOWPOWER Battery Management, DFN-8-EP(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 1mo ago
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lp5305aqvf-etched.glb lp5305aqvf: factory component page (tier=lcsc) · Ray 1mo ago
lp5305aqvf-etched.step lp5305aqvf: factory component page (tier=lcsc) · Ray 1mo ago
lp5305aqvf-hero.glb lp5305aqvf: hero GLB from the etched model (keeps the MPN mark) · Ray 1mo ago
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LP5305AQVF

LOWPOWER · Battery Management · DFN-8-EP(2x2)

LP5305AQVF from LOWPOWER, in a DFN-8-EP(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Power source input, rated -0.3V to +30V to GND with 3.3V to 5V recommended operating range; connect a ceramic capacitor between VIN and GND.
2 GND power_in Ground reference for the device; all grounds should be tied together on one uninterrupted ground plane.
3 NC unconnected No connect; the datasheet specifies no internal connection for this pin.
4 Fault output Open-drain fault output indicating device status (input OVP, output OCP, battery OVP, over-temperature); logic low is 0.2V max at 5mA sink and pin limits are -0.3V to +7V.
5 EN input Enable pin with VENH 1.4V min and VENL 0.4V max thresholds; it has an internal pull-down and may be left floating, and driving it high turns the power switch off.
6 BAT input Battery voltage detector input; the battery overvoltage threshold is 4.35V with 275mV hysteresis and 200µs blanking, and BAT leakage is 10nA max at 4.4V.
7 ISET passive Overcurrent limit setting pin; a resistor RSET to GND sets IOCP = 25000 / RSET, with RSET specified from 15kΩ to 90kΩ.
8 VOUT power_out Output through the power MOSFET, rated -0.3V to +7V to GND; RDS(ON) is 160 mΩ typ and 250 mΩ max at 1A.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package DFN-8-EP(2x2)
Category Power Management (PMIC)
Pins 9

CAD (KiCad official)

  • Symbol: LP5305AQVF
  • Footprint: Package_DFN_QFN:DFN-8-1EP_2x2mm_P0.5mm_EP0.6x1.2mm
  • 3D model: DFN-8-EP(2x2) (KiCad packages3D, STEP)
  • 3D model files: lp5305aqvf-etched.step / lp5305aqvf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp5305aqvf.step / lp5305aqvf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (7 pp, sha256 af9a27626bf747bc, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF