# LP4030HBQVF-87

**LOWPOWER** · Battery Management · DFN-10-EP(3x3)

LP4030HBQVF-87 from LOWPOWER, in a DFN-10-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Positive supply voltage input supporting 4.5V to 20V operation with a 28V absolute maximum rating; place a 1µF ceramic capacitor from IN to PGND as close to the IC as possible. |
| 2 | TS | input | Battery temperature sense thermistor input that suspends charging when the battery temperature is out of range, with hot threshold 30% VIN and cold threshold 60% VIN. |
| 3 | STAT | output | Open-drain charge status output that is pulled down to GND by an internal N-channel MOSFET while charging and is high impedance when charge is complete; STAT sink current is limited to 10mA absolute maximum. |
| 4 | PMID | power_out | Power MOSFET input node that connects to a 10µF ceramic capacitor to ground and should be placed as close as possible to the IC. |
| 5 | PGND | power_in | Power ground for the charger power stage, connected to AGND through a single-point connection. |
| 6 | AGND | power_in | Analog ground reference for the control and sensing circuitry, connected to PGND at a single point. |
| 7 | BST | power_in | High-side MOSFET driver supply input connected to the internal bootstrap diode cathode; connect a 47nF bootstrap capacitor from BST to SW, with BST to SW voltage limited to 6V absolute maximum. |
| 8 | SW | passive | Switching node connected to the high-side source and low-side drain that must be connected to the external inductor; SW to GND voltage is rated to 28V absolute maximum. |
| 9 | CSP | input | Charge current sensing positive input connected to the external current sense resistor Rcs, with voltage rated to 28V absolute maximum. |
| 10 | BAT | bidirectional | Battery voltage sensing and charge current sensing negative input connected to the battery positive terminal, withstanding up to 28V; a 10µF ceramic capacitor is recommended from this pin to PGND. |
| 11 | PAD | power_in | Ground reference for the device and thermal pad that conducts heat from the device to the PCB. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | DFN-10-EP(3x3) |
| Category | Power Management (PMIC) |
| Pins | 11 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Range | VIN | 4.5 |  | 20 | V |  | 5 |
| Under Voltage Lockout of VIN (rising) | VUVLO | 3.7 | 3.9 | 4.1 | V | VIN Rising | 5 |
| Over-Voltage Protection Threshold Voltage | VOVP | 21 | 22 | 23 | V | VIN Rising | 5 |
| Input Dynamic Power Management Threshold Voltage | VDPM_THR | 4.3 | 4.4 | 4.5 | V | Input voltage is in regulation and charge current is reduced. | 5 |
| VFLOAT regulated output voltage tolerance (LP4030HBQVF-87) | VFLOAT | -1 |  | 1 | % |  | 6 |
| CSP to BAT Reference Voltage (Program Fast Charge Current) | VCS | 48 | 51 | 54 | mV | VTRIKL<VBAT<VFLOAT | 6 |
| Absolute max voltage on IN, PMID, SW, STAT, BAT, CSP, TS to GND |  | -0.3 |  | 28 | V | Voltage to GND | 4 |
| Absolute max voltage BST to SW |  | -0.3 |  | 6 | V | BST to SW voltage | 4 |
| STAT sink current |  |  |  | 10 | mA |  | 4 |
| Maximum Junction Temperature (TJ) | TJ |  |  | 150 | ℃ |  | 4 |
| Operating Ambient Temperature Range (TA) | TA | -40 |  | 85 | ℃ |  | 4 |
| Maximum Soldering Temperature |  |  |  | 260 | ℃ | At leads, 10 sec | 4 |
| ESD susceptibility HBM |  |  |  | 2 | kV | Human Body Model | 4 |
| ESD susceptibility MM |  |  |  | 200 | V | Machine Model | 4 |
| Input Voltage (recommended) | VIN | 4.5 |  | 20 | V |  | 5 |
| Maximum Charge Current (recommended) |  |  |  | 3 | A |  | 5 |
| Operating Junction Temperature Range (TJ) | TJ | -40 |  | 150 | ℃ |  | 5 |
| Ambient Temperature Range | TA | -40 |  | 85 | ℃ |  | 5 |
| VFLOAT Regulated Output Voltage (LP4030HBQVF-87) | VFLOAT |  | 8.7 |  | V |  | 6 |
| Standby supply current, standby mode (charge terminated) | ICC |  | 500 |  | μA | Standby mode (charge terminated) | 5 |
| UVLO hysteresis | VUVLO_HYS |  | 150 |  | mV | VIN Falling | 5 |
| OVP hysteresis | VOVP_HYS |  | 700 |  | mV | VIN Falling | 5 |
| Constant charge current, RCS=50mΩ | IBAT |  | 1020 |  | mA | RCS=50mΩ, Constant Current Mode | 6 |
| Constant charge current, RCS=25mΩ | IBAT |  | 2040 |  | mA | RCS=25mΩ, Constant Current Mode | 6 |
| Trickle charge current | ITRIKL |  | 102 |  | mA | VBAT<VTRIKL, RCS=50mΩ | 6 |
| Termination current | ITERM |  | 102 |  | mA | RCS=50mΩ | 7 |
| STAT pin output low voltage | VSTAT |  | 0.5 |  | V | ISTAT=5mA | 7 |
| Junction over temperature protection threshold | TJ_THR |  | 150 |  | ℃ | Temperature Rising | 7 |
| TJ_THR hysteresis | TJ_HYS |  | 30 |  | ℃ | Temperature Falling | 7 |
| Switching frequency | FSW |  | 520 |  | kHz |  | 7 |
| Switch MOSFET current limit | IMOS_LIM |  | 4.5 |  | A |  | 7 |
| IN-PMID MOSFET on-resistance | RIN-PMID |  | 50 |  | mΩ |  | 7 |
| PMID-SW MOSFET on-resistance | RPMID-SW |  | 50 |  | mΩ |  | 7 |
| SW-PGND MOSFET on-resistance | RSW-GND |  | 50 |  | mΩ |  | 7 |
| NTC threshold (Hot) | VNTC_H |  | 30 |  | % VIN | VNTC_H falling, percentage to VIN | 7 |
| NTC threshold (Cold) | VNTC_C |  | 60 |  | % VIN | VNTC_C rising, percentage to VIN | 7 |
| Thermal Resistance junction-to-ambient | θJA |  | 45 |  | ℃/W |  | 5 |
| Thermal Resistance junction-to-case | θJC |  | 8 |  | ℃/W |  | 5 |

## Materials and finish

As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).

| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper |  | AGND. 4. Place inductor input terminal to SW pin as close as possible. Minimize the copper area of this trace to | 12 |

## CAD (KiCad official)

- Symbol: `LP4030HBQVF-87`
- Footprint: `Package_DFN_QFN:DFN-10-1EP_3x3mm_P0.5mm_EP1.55x2.48mm`
- 3D model: DFN-10-EP(3x3) (KiCad packages3D, STEP)
- 3D model files: `lp4030hbqvf-87-etched.step` / `lp4030hbqvf-87-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp4030hbqvf-87.step` / `lp4030hbqvf-87.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [LOWPOWER datasheet](docs/lp4030hbqvf-87-datasheet.pdf) (13 pp, sha256 `230b73688e6d4d02`, retrieved 2026-11-05, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/lp4030hbqvf-87-datasheet.pdf)