component
LP3997-33QVF
Public Made by Adomby adom
LOWPOWER Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP3997-33QVF
LOWPOWER · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
LP3997-33QVF from LOWPOWER, in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground, placed as close to the pin as possible. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Active-high enable; driving EN above 1V turns on the regulator and driving it below 0.4V puts the regulator into shutdown mode. |
| 4 | VIN | power_in | Supply input pin with an operating range of 1.6V to 6.0V; must be decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Operation Range | VIN | 1.6 | 6 | V | 5 | ||
| Output Voltage Accuracy | VOUT | 3.25 | 3.3 | 3.35 | V | ILOAD=1mA | 5 |
| Load Current Limit | ILIMIT | 400 | 500 | mA | VOUT=0.9*VOUT(Nom) | 5 | |
| Input Voltage | VIN | 1.6 | 6 | V | 4 | ||
| Operating Junction Temperature Range | TJ | -40 | 150 | ℃ | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | ℃ | 4 | ||
| VIN Pin to GND | VIN | -0.3 | 6.5 | V | 4 | ||
| VOUT, EN Pin to GND | VOUT, EN | -0.3 | V | upper limit printed as VIN (not numeric) | 4 | ||
| Maximum Junction Temperature | TJ | 150 | ℃ | 4 | |||
| Operating Ambient Temperature Range | TA | -40 | 85 | ℃ | 4 | ||
| Maximum Soldering Temperature | 260 | ℃ | at leads, 10 sec | 4 | |||
| ESD Human Body Model | HBM | 4 | kV | HBM | 4 | ||
| ESD Charged Device Model | CDM | 1 | kV | CDM | 4 | ||
| DC Supply Quiescent Current | IQ | 2 | μA | VEN=VIN, ILOAD=0mA | 5 | ||
| Shutdown Current | ISD | 1 | μA | VEN=0V | 5 | ||
| Output Voltage Line Regulation | VOUT | 0.02 | %/V | VIN=VOUT+0.5V~6V, ILOAD=1mA | 5 | ||
| Output Voltage Load Regulation | VLOAD | 20 | mV | ILOAD from 1mA to 300mA | 5 | ||
| Max Load Current | IOUT_MAX | 300 | mA | VEN=VIN | 5 | ||
| Short Current Limit | ISHORT | 50 | mA | VOUT short to GND | 5 | ||
| Dropout Voltage | VDROP | 60 | mV | VOUT=3.3V, ILOAD=100mA | 5 | ||
| Dropout Voltage | VDROP | 180 | mV | VOUT=3.3V, ILOAD=300mA | 5 | ||
| Output Noise | eN | 60 | μVRMS | 10Hz to 100kHz, VOUT=3.3V, ILOAD=20mA | 5 | ||
| Power Supply Rejection Ratio at 1kHz | PSRR | 65 | dB | f=1kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 | ||
| Power Supply Rejection Ratio at 10kHz | PSRR | 58 | dB | f=10kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 | ||
| Power Supply Rejection Ratio at 100kHz | PSRR | 52 | dB | f=100kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 | ||
| Auto-Discharge Resistance | RDIS | 160 | Ω | 5 | |||
| Thermal Shutdown Threshold | TSD | 155 | ℃ | 5 | |||
| Thermal Shutdown Hysteresis | TSD_HYS | 25 | ℃ | 5 | |||
| EN Logic High Voltage | VENH | 1 | V | 5 | |||
| EN Logic Low Voltage | VENL | 0.4 | V | 5 | |||
| EN Input Current | IEN | 120 | nA | VEN=0 to 5.5V | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | practically possible to the respective LDO pins. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible with a wide and compon | 10 |
CAD (KiCad official)
- Symbol:
LP3997-33QVF - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
lp3997-33qvf-etched.step/lp3997-33qvf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3997-33qvf.step/lp3997-33qvf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER datasheet (16 pp, sha256
685b6d34991cec02, retrieved 2026-10-25, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP3997-33QVF
**LOWPOWER** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
LP3997-33QVF from LOWPOWER, in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground, placed as close to the pin as possible. |
| 2 | GND | power_in | Ground reference pin for the regulator. |
| 3 | EN | input | Active-high enable; driving EN above 1V turns on the regulator and driving it below 0.4V puts the regulator into shutdown mode. |
| 4 | VIN | power_in | Supply input pin with an operating range of 1.6V to 6.0V; must be decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Operation Range | VIN | 1.6 | | 6 | V | | 5 |
| Output Voltage Accuracy | VOUT | 3.25 | 3.3 | 3.35 | V | ILOAD=1mA | 5 |
| Load Current Limit | ILIMIT | 400 | | 500 | mA | VOUT=0.9*VOUT(Nom) | 5 |
| Input Voltage | VIN | 1.6 | | 6 | V | | 4 |
| Operating Junction Temperature Range | TJ | -40 | | 150 | ℃ | | 4 |
| Ambient Temperature Range | TA | -40 | | 85 | ℃ | | 4 |
| VIN Pin to GND | VIN | -0.3 | | 6.5 | V | | 4 |
| VOUT, EN Pin to GND | VOUT, EN | -0.3 | | | V | upper limit printed as VIN (not numeric) | 4 |
| Maximum Junction Temperature | TJ | | | 150 | ℃ | | 4 |
| Operating Ambient Temperature Range | TA | -40 | | 85 | ℃ | | 4 |
| Maximum Soldering Temperature | | | | 260 | ℃ | at leads, 10 sec | 4 |
| ESD Human Body Model | HBM | | | 4 | kV | HBM | 4 |
| ESD Charged Device Model | CDM | | | 1 | kV | CDM | 4 |
| DC Supply Quiescent Current | IQ | | 2 | | μA | VEN=VIN, ILOAD=0mA | 5 |
| Shutdown Current | ISD | | 1 | | μA | VEN=0V | 5 |
| Output Voltage Line Regulation | VOUT | | 0.02 | | %/V | VIN=VOUT+0.5V~6V, ILOAD=1mA | 5 |
| Output Voltage Load Regulation | VLOAD | | 20 | | mV | ILOAD from 1mA to 300mA | 5 |
| Max Load Current | IOUT_MAX | | 300 | | mA | VEN=VIN | 5 |
| Short Current Limit | ISHORT | | 50 | | mA | VOUT short to GND | 5 |
| Dropout Voltage | VDROP | | 60 | | mV | VOUT=3.3V, ILOAD=100mA | 5 |
| Dropout Voltage | VDROP | | 180 | | mV | VOUT=3.3V, ILOAD=300mA | 5 |
| Output Noise | eN | | 60 | | μVRMS | 10Hz to 100kHz, VOUT=3.3V, ILOAD=20mA | 5 |
| Power Supply Rejection Ratio at 1kHz | PSRR | | 65 | | dB | f=1kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 |
| Power Supply Rejection Ratio at 10kHz | PSRR | | 58 | | dB | f=10kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 |
| Power Supply Rejection Ratio at 100kHz | PSRR | | 52 | | dB | f=100kHz; VIN=(VOUT+1V) DC+0.2VP-P, IOUT=20mA, VOUT=3.3V | 5 |
| Auto-Discharge Resistance | RDIS | | 160 | | Ω | | 5 |
| Thermal Shutdown Threshold | TSD | | 155 | | ℃ | | 5 |
| Thermal Shutdown Hysteresis | TSD_HYS | | 25 | | ℃ | | 5 |
| EN Logic High Voltage | VENH | | 1 | | V | | 5 |
| EN Logic Low Voltage | VENL | | 0.4 | | V | | 5 |
| EN Input Current | IEN | | 120 | | nA | VEN=0 to 5.5V | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | practically possible to the respective LDO pins. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible with a wide and compon | 10 |
## CAD (KiCad official)
- Symbol: `LP3997-33QVF`
- Footprint: `Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm`
- 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files: `lp3997-33qvf-etched.step` / `lp3997-33qvf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp3997-33qvf.step` / `lp3997-33qvf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LOWPOWER datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8604443006045077504) (16 pp, sha256 `685b6d34991cec02`, retrieved 2026-10-25, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp3997-33qvf-datasheet.pdf)