component
LP3997-18QVF
Public Made by Adomby adom
LOWPOWER(微源半导体) Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, DFN-4-EP(1x1). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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LP3997-18QVF
LOWPOWER(微源半导体) · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
LP3997-18QVF from LOWPOWER(微源半导体), in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground, placed as close to the pin as possible. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Active-high enable; driving EN over 1V turns the regulator on and driving EN below 0.4V puts it into shutdown mode. |
| 4 | VIN | power_in | Supply input; must be closely decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER(微源半导体) |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Operation Range | VIN | 1.6 | 6 | V | 5 | ||
| VIN Pin to GND | VIN | -0.3 | 6.5 | V | 4 | ||
| VOUT, EN Pin to GND | VOUT, EN | -0.3 | V | Maximum is VIN (printed as -0.3~VIN) | 4 | ||
| Maximum Junction Temperature (TJ) | TJ | 150 | ℃ | 4 | |||
| Operating Ambient Temperature Range (TA) | TA | -40 | 85 | ℃ | 4 | ||
| Maximum Soldering Temperature (at leads) | 260 | ℃ | at leads, 10 sec | 4 | |||
| ESD Human Body Model (HBM) | 4 | kV | HBM | 4 | |||
| ESD Charged Device Model (CDM) | 1 | kV | CDM | 4 | |||
| Input Voltage | VIN | 1.6 | 6 | V | 4 | ||
| Operating Junction Temperature Range (TJ) | TJ | 150 | ℃ | Printed as '40℃ to 150℃' in the datasheet text; minus sign not visible in extraction, see review_required | 4 | ||
| Ambient Temperature Range | TA | -40 | 85 | ℃ | 4 | ||
| EN Logic High Voltage | VENH | 1 | V | 5 | |||
| EN Logic Low Voltage | VENL | 0.4 | V | 5 | |||
| Load Current Limit | ILIMIT | 400 | 500 | mA | VOUT=0.9*VOUT(Nom) | 5 | |
| Output Voltage Line Regulation | 0.02 | %/V | VIN=VOUT+0.5V~6V, ILOAD=1mA | 5 | |||
| Output Voltage Load Regulation | VLOAD | 20 | mV | ILOAD from 1mA to 300mA | 5 | ||
| Short Current Limit | ISHORT | 50 | mA | VOUT short to GND | 5 | ||
| Thermal Shutdown Threshold | TSD | 155 | ℃ | 5 | |||
| Auto-Discharge Resistance | RDIS | 160 | Ω | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | practically possible to the respective LDO pins. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible with a wide and compon | 10 |
CAD (KiCad official)
- Symbol:
LP3997-18QVF - Footprint:
Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm - 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files:
lp3997-18qvf-etched.step/lp3997-18qvf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3997-18qvf.step/lp3997-18qvf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: LOWPOWER(微源半导体) datasheet (16 pp, sha256
44cf7dbeb160d1d3, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# LP3997-18QVF
**LOWPOWER(微源半导体)** · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · DFN-4-EP(1x1)
LP3997-18QVF from LOWPOWER(微源半导体), in a DFN-4-EP(1x1). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VOUT | power_out | Output pin; bypass with a 1μF or greater ceramic capacitor from this pin to ground, placed as close to the pin as possible. |
| 2 | GND | power_in | Ground pin. |
| 3 | EN | input | Active-high enable; driving EN over 1V turns the regulator on and driving EN below 0.4V puts it into shutdown mode. |
| 4 | VIN | power_in | Supply input; must be closely decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible. |
| 5 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | LOWPOWER(微源半导体) |
| Package | DFN-4-EP(1x1) |
| Category | Power Management (PMIC) |
| Pins | 5 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input Voltage Operation Range | VIN | 1.6 | | 6 | V | | 5 |
| VIN Pin to GND | VIN | -0.3 | | 6.5 | V | | 4 |
| VOUT, EN Pin to GND | VOUT, EN | -0.3 | | | V | Maximum is VIN (printed as -0.3~VIN) | 4 |
| Maximum Junction Temperature (TJ) | TJ | | | 150 | ℃ | | 4 |
| Operating Ambient Temperature Range (TA) | TA | -40 | | 85 | ℃ | | 4 |
| Maximum Soldering Temperature (at leads) | | | | 260 | ℃ | at leads, 10 sec | 4 |
| ESD Human Body Model (HBM) | | | | 4 | kV | HBM | 4 |
| ESD Charged Device Model (CDM) | | | | 1 | kV | CDM | 4 |
| Input Voltage | VIN | 1.6 | | 6 | V | | 4 |
| Operating Junction Temperature Range (TJ) | TJ | | | 150 | ℃ | Printed as '40℃ to 150℃' in the datasheet text; minus sign not visible in extraction, see review_required | 4 |
| Ambient Temperature Range | TA | -40 | | 85 | ℃ | | 4 |
| EN Logic High Voltage | VENH | 1 | | | V | | 5 |
| EN Logic Low Voltage | VENL | | | 0.4 | V | | 5 |
| Load Current Limit | ILIMIT | 400 | | 500 | mA | VOUT=0.9*VOUT(Nom) | 5 |
| Output Voltage Line Regulation | | | 0.02 | | %/V | VIN=VOUT+0.5V~6V, ILOAD=1mA | 5 |
| Output Voltage Load Regulation | VLOAD | | 20 | | mV | ILOAD from 1mA to 300mA | 5 |
| Short Current Limit | ISHORT | | 50 | | mA | VOUT short to GND | 5 |
| Thermal Shutdown Threshold | TSD | | 155 | | ℃ | | 5 |
| Auto-Discharge Resistance | RDIS | | 160 | | Ω | | 5 |
## Materials and finish
As the datasheet states them (page.json `metadata.appearance`; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | | practically possible to the respective LDO pins. Place ground return connections to the input and output capacitors, and to the LDO ground pin as close to each other as possible with a wide and compon | 10 |
## CAD (KiCad official)
- Symbol: `LP3997-18QVF`
- Footprint: `Package_DFN_QFN:UDFN-4-1EP_1x1mm_P0.65mm_EP0.48x0.48mm`
- 3D model: DFN-4-EP(1x1) (KiCad packages3D, STEP)
- 3D model files: `lp3997-18qvf-etched.step` / `lp3997-18qvf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `lp3997-18qvf.step` / `lp3997-18qvf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [LOWPOWER(微源半导体) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603016935823331328) (16 pp, sha256 `44cf7dbeb160d1d3`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/lp3997-18qvf-datasheet.pdf)