LP3985IM5X-2.8
Public Made by Adomby adom
Texas Instruments Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗PCB Footprint
Open full view ↗Datasheet
Open in new tab ↗Contents
README
markdownLP3985IM5X-2.8
Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5
LP3985IM5X-2.8 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage of the LDO, specified from 2.5 V to 6 V (VIN supply range) with an absolute maximum of 6.5 V. |
| 2 | GND | power_in | Common ground; all voltages in the datasheet are referenced to this pin. |
| 3 | EN | input | Enable input logic, enable high, with the ON/OFF input voltage range of 0 V to VIN. |
| 4 | BYPASS | bidirectional | Optional bypass capacitor connection for noise reduction, which lowers output noise without slowing load transient response. |
| 5 | OUT | output | Output voltage of the LDO, rated for up to 150 mA output current; the OUT voltage is limited to -0.3 V to (VIN + 0.3) V and less than 6.5 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Management (PMIC) |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Output voltage tolerance | -2 | 2 | % | IOUT = 1 mA; TA = 25°C only | 5 | ||
| Output voltage tolerance over temperature | -3 | 3 | % | 5 | |||
| Line regulation error | ΔVOUT | -0.1 | 0.1 | %/V | VIN = (VOUT(nom) + 0.5 V) to 6 V; For all other options | 5 | |
| Load regulation error (SOT23-5) | 0.0025 | 0.005 | %/mA | IOUT = 1 mA to 150 mA; LP3985IM5 (SOT23-5) | 5 | ||
| Quiescent current | IQ | 85 | 150 | µA | VEN = 1.4 V, IOUT = 0 mA; For all other options | 5 | |
| Quiescent current at load | IQ | 140 | 200 | µA | VEN = 1.4 V, IOUT = 0 to 150 mA; For all other options | 5 | |
| Shutdown current | 0.003 | 1.5 | µA | VEN = 0.4 V | 5 | ||
| Dropout voltage | 0.4 | 2 | mV | IOUT = 1 mA | 5 | ||
| Dropout voltage | 20 | 35 | mV | IOUT = 50 mA | 5 | ||
| Dropout voltage | 45 | 70 | mV | IOUT = 100 mA | 5 | ||
| Dropout voltage | 60 | 100 | mV | IOUT = 150 mA | 5 | ||
| Short circuit current limit | ISC | 600 | mA | Output grounded; Steady State | 5 | ||
| Peak output current | IOUT(PK) | 300 | 550 | mA | VOUT ≥ VOUT(nom), 5% | 5 | |
| Turnon time | TON | 200 | µs | CBYPASS = 0.01 µF | 5 | ||
| Output noise voltage | en | 30 | µVRMS | BW = 10 Hz to 100 kHz, COUT = 1 µF | 5 | ||
| Output noise density | en | 230 | nV/√Hz | CBP = 0 | 5 | ||
| Maximum input current at EN | IEN | -1 | 1 | nA | VEN = 0.4 V and VIN = 6 V | 5 | |
| Maximum low-level input voltage at EN | VIL | 0.4 | V | VIN = 2.5 V to 6 V | 5 | ||
| Minimum high-level input voltage at EN | VIH | 1.4 | V | VIN = 2.5 V to 6 V | 5 | ||
| Thermal shutdown temperature | TSD | 160 | °C | 5 | |||
| Thermal shutdown hysteresis | 20 | °C | 5 | ||||
| Supply input voltage | VIN | 2.5 | 6 | V | 4 | ||
| ON/OFF input voltage | VEN | 0 | V | max VIN | 4 | ||
| Output current | IOUT | 150 | mA | 4 | |||
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Input voltage IN, EN | -0.3 | 6.5 | V | Voltages with respect to GND | 4 | ||
| Output voltage OUT | -0.3 | V | max (VIN + 0.3) < 6.5 | 4 | |||
| Junction temperature | 150 | °C | 4 | ||||
| Lead temperature | 235 | °C | 4 | ||||
| Pad temperature | 235 | °C | 4 | ||||
| Maximum power dissipation SOT-23 | PD | 364 | mW | TJ = 150°C, TA = 70°C, RθJA = 220°C/W | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Junction-to-ambient thermal resistance SOT-23 | RθJA | 220 | °C/W | SOT-23 (DBV), 5 pins | 4 | ||
| Junction-to-case (top) thermal resistance SOT-23 | RθJC(top) | 79.8 | °C/W | SOT-23 (DBV), 5 pins | 4 | ||
| Junction-to-board thermal resistance SOT-23 | RθJB | 31.6 | °C/W | SOT-23 (DBV), 5 pins | 4 | ||
| Junction-to-top characterization parameter SOT-23 | ψJT | 3.1 | °C/W | SOT-23 (DBV), 5 pins | 4 | ||
| Junction-to-board characterization parameter SOT-23 | ψJB | 31.1 | °C/W | SOT-23 (DBV), 5 pins | 4 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| contacts | copper | capacitor, and to the LDO ground pin as close to each other as possible, connected by a wide, component-side, copper surface. The use of vias and long traces to create LDO circuit connections is stron | 19 |
CAD (KiCad official)
- Symbol:
LP3985IM5X-2.8 - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
lp3985im5x-2-8-etched.step/lp3985im5x-2-8-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);lp3985im5x-2-8.step/lp3985im5x-2-8.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
ec4787d8991ef2e7, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).