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Contents

README

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LP3985IM5-5.0

Texas Instruments · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LP3985IM5-5.0 from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN input Input voltage to the LDO regulator, recommended operating range 2.5 V to 6 V.
2 GND power_in Common ground and return path for the LDO circuit.
3 EN input Enable input; device enabled when VEN > 1.4 V, disabled and draws <1.5 µA shutdown current when VEN < 0.4 V.
4 BYPASS bidirectional Bypass capacitor connection for noise reduction; 0.01 µF capacitor to ground reduces output noise without affecting transient response.
5 OUT output Regulated output voltage, 5.0 V nominal with ±2% accuracy at 1 mA load and 25°C.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

CAD (KiCad official)

  • Symbol: LP3985IM5-5.0
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lp3985im5-5-0-etched.step / lp3985im5-5-0-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3985im5-5-0.step / lp3985im5-5-0.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (34 pp, sha256 ec4787d8991ef2e7, retrieved 2026-09-24, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF