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LP3982S-33B5F

Public Made by Adom

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LOWPOWER Voltage Regulators - Linear, Low Drop Out (LDO) Regulators, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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LP3982S-33B5F

LOWPOWER · Voltage Regulators - Linear, Low Drop Out (LDO) Regulators · SOT-23-5

LP3982S-33B5F from LOWPOWER, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VIN power_in Supply input pin that must be closely decoupled to GND with a 1μF or greater ceramic capacitor placed as close to the pin as possible.
2 GND power_in Ground pin.
3 EN input Active-high enable pin: driving EN over 1V turns on the regulator, and driving EN below 0.4V puts it into shutdown mode.
4 NC unconnected No connection.
5 VOUT power_out Output pin that should be bypassed to ground with a 1μF or greater ceramic capacitor placed as close to the pin as possible.

Key specifications

Parameter Value
Manufacturer LOWPOWER
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Operation Range VIN 2.2 5.5 V 5
Output Voltage Accuracy (3.3V option) VOUT 3.267 3.3 3.333 V IOUT=1mA 5
Output Voltage Load Regulation ΔVLOAD 16 28 mV IOUT from 1mA to 300mA 5
Load Current Limit ILIMIT 400 550 mA VEN=VIN 5
Max Load Current IOUT_MAX 300 mA VEN=VIN 5
EN Logic High Voltage VENH 1 V 6
EN Logic Low Voltage VENL 0.4 V 6
VIN Pin to GND VIN -0.3 6.5 V 4
VOUT, EN Pin to GND VOUT, EN -0.3 V Printed upper limit is VIN (-0.3~VIN) 4
Maximum Junction Temperature TJ 150 ℃ 4
Maximum Soldering Temperature 260 ℃ at leads, 10 sec 4
ESD HBM 4 kV Human Body Model 4
ESD CDM 1 kV Charged Device Model 4
Operating Junction Temperature Range TJ -40 150 ℃ 4
Ambient Temperature Range TA -40 85 ℃ 4
Thermal Shutdown Threshold TSD 160 ℃ 6
Auto-discharge On-Resistance RDISC 850 Ω 6
Thermal Resistance (SOT23-5, θJA) θJA 220 °C/W Measured using 2S2P JEDEC standard PCB with ambient temperature < 25°C 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper output capacitors, and to the LDO ground pin as close to each other as possible with a wide and component￾side copper surface. The use of vias and long traces to 12

CAD (KiCad official)

  • Symbol: LP3982S-33B5F
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: lp3982s-33b5f-etched.step / lp3982s-33b5f-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3982s-33b5f.step / lp3982s-33b5f.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: LOWPOWER datasheet (18 pp, sha256 fcd4a32c06506e21, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF