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LP3907SQ-PJXIX

Texas Instruments · DC-DC Converters · WQFN-24-EP(4x4)

LP3907SQ-PJXIX from Texas Instruments, in a WQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VINLDO12 power_in Analog power supply for internal functions (VREF, BIAS, I2C, Logic); operational range 2.8V to 5.5V.
2 EN_T input Enable input for preset power-on sequence; rising edge triggers power-up with programmable delay.
3 nPOR output Open-drain power-on reset output for Buck1 and Buck2; pulled low when supply voltages invalid, 100kΩ external pullup required.
4 GND_SW1 power_in Buck1 NMOS power switch ground return.
5 SW1 power_out Buck1 switcher output pin; connect to external inductor for step-down conversion.
6 VIN1 power_in Power input for Buck1 from battery or DC source; 2.8V to 5.5V.
7 ENSW1 input Logic input to enable Buck1 switcher; HIGH enables operation.
8 FB1 input Buck1 feedback input terminal for output voltage regulation; compared against 0.5V internal reference.
9 GND_C power_in Non-switching core ground for logic and reference circuits.
10 AVDD power_in Analog power for Buck converter error amplifiers; 2.8V to 5.5V.
11 FB2 input Buck2 feedback input terminal for output voltage regulation; compared against 0.5V internal reference.
12 ENSW2 input Logic input to enable Buck2 switcher; HIGH enables operation.
13 VIN2 power_in Power input for Buck2 from battery or DC source; 2.8V to 5.5V.
14 SW2 power_out Buck2 switcher output pin; connect to external inductor for step-down conversion.
15 GND_SW2 power_in Buck2 NMOS power switch ground return.
16 SDA bidirectional I2C serial data line; open-drain bidirectional, external pullup resistor required.
17 SCL input I2C serial clock input; logic signal, external pullup resistor required.
18 GND_L power_in LDO ground return.
19 VINLDO1 power_in Power input for LDO1 from battery or DC source; 1.74V to 5.5V with minimum 0.3V headroom above output.
20 LDO1 power_out LDO1 regulated output; programmable 1.0V to 3.5V, 300mA maximum output current, 30mV typical dropout voltage.
21 ENLDO1 input Logic input to enable LDO1; HIGH enables regulation.
22 ENLDO2 input Logic input to enable LDO2; HIGH enables regulation.
23 LDO2 power_out LDO2 regulated output; programmable 1.0V to 3.5V, 300mA maximum output current, 30mV typical dropout voltage.
24 VINLDO2 power_in Power input for LDO2 from battery or DC source; 1.74V to 5.5V with minimum 0.3V headroom above output.
25 DAP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package WQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: LP3907SQ-PJXIX
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: WQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: lp3907sq-pjxix-etched.step / lp3907sq-pjxix-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); lp3907sq-pjxix.step / lp3907sq-pjxix.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (61 pp, sha256 28f50063d0d77651, retrieved 2026-09-26, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF